Invention Grant
- Patent Title: Method for fabricating array-molded package-on-package
- Patent Title (中): 阵列封装封装的方法
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Application No.: US13789109Application Date: 2013-03-07
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Publication No.: US08574967B2Publication Date: 2013-11-05
- Inventor: Mark A. Gerber , David N. Walter
- Applicant: Texas Instruments Incorporated
- Applicant Address: US TX Dallas
- Assignee: Texas Instruments Incorporated
- Current Assignee: Texas Instruments Incorporated
- Current Assignee Address: US TX Dallas
- Agent Steven A. Shaw; W. James Brady; Frederick J. Telecky, Jr.
- Main IPC: H01L21/00
- IPC: H01L21/00

Abstract:
An improved semiconductor device package is manufactured by attaching semiconductor chips (130) on an insulating substrate (101) having contact pads (103). A mold is provided, which has a top portion (210) with metal protrusions (202) at locations matching the pad locations. The protrusions are shaped as truncated cones. The substrate and the chips are loaded onto the bottom mold portion (310); the mold is closed by clamping the top portion onto the bottom portion so that the protrusions approach the contact pads. Encapsulation compound is introduced into the cavity and the protrusions create apertures through the encapsulation compound towards the pad locations.
Public/Granted literature
- US20130189814A1 Method for Fabricating Array-Molded Package-on-Package Public/Granted day:2013-07-25
Information query
IPC分类: