Invention Grant
- Patent Title: Method and apparatus for filling interconnect structures
- Patent Title (中): 用于填充互连结构的方法和装置
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Application No.: US13108894Application Date: 2011-05-16
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Publication No.: US08575028B2Publication Date: 2013-11-05
- Inventor: Jonathan D. Reid , Huanfeng Zhu
- Applicant: Jonathan D. Reid , Huanfeng Zhu
- Applicant Address: US CA Fremont
- Assignee: Novellus Systems, Inc.
- Current Assignee: Novellus Systems, Inc.
- Current Assignee Address: US CA Fremont
- Agency: Weaver Austin Villeneuve & Sampson LLP
- Main IPC: H01L21/44
- IPC: H01L21/44

Abstract:
Methods, apparatus, and systems for depositing copper and other metals are provided. In some implementations, a wafer substrate is provided to an apparatus. The wafer substrate has a surface with field regions and a feature. A copper layer is plated onto the surface of the wafer substrate. The copper layer is annealed to redistribute copper from regions of the wafer substrate to the feature. Implementations of the disclosed methods, apparatus, and systems allow for void-free bottom-up fill of features in a wafer substrate.
Public/Granted literature
- US20120264290A1 METHOD AND APPARATUS FOR FILLING INTERCONNECT STRUCTURES Public/Granted day:2012-10-18
Information query
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