Invention Grant
- Patent Title: Method and structure having monolithic heterogeneous integration of compound semiconductors with elemental semiconductor
- Patent Title (中): 化合物半导体与元素半导体的单片非均匀整合的方法和结构
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Application No.: US13249579Application Date: 2011-09-30
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Publication No.: US08575666B2Publication Date: 2013-11-05
- Inventor: Jeffrey R. LaRoche , Thomas E. Kazior , William E. Hoke
- Applicant: Jeffrey R. LaRoche , Thomas E. Kazior , William E. Hoke
- Applicant Address: US MA Waltham
- Assignee: Raytheon Company
- Current Assignee: Raytheon Company
- Current Assignee Address: US MA Waltham
- Agency: Daly, Crowley, Mofford & Durkee, LLP
- Main IPC: H01L31/113
- IPC: H01L31/113

Abstract:
A semiconductor structure having compound semiconductor (CS) device formed in a compound semiconductor of the structure and an elemental semiconductor device formed in an elemental semiconductor layer of the structure. The structure includes a layer having an elemental semiconductor device is disposed over a buried oxide (BOX) layer. A selective etch layer is disposed between the BOX layer and a layer for a compound semiconductor device. The selective etch layer enables selective etching of the BOX layer to thereby maximize vertical and lateral window etch process control for the compound semiconductor device grown in etched window. The selective etch layer has a lower etch rate than the etch rate of the BOX layer.
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