Invention Grant
- Patent Title: Semiconductor device and method for fabricating semiconductor device
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Application No.: US12882826Application Date: 2010-09-15
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Publication No.: US08575702B2Publication Date: 2013-11-05
- Inventor: Jae-Han Cha , Kyung-Ho Lee , Sun-Goo Kim , Hyung-Suk Choi , Ju-Ho Kim , Jin-Young Chae , In-Taek Oh
- Applicant: Jae-Han Cha , Kyung-Ho Lee , Sun-Goo Kim , Hyung-Suk Choi , Ju-Ho Kim , Jin-Young Chae , In-Taek Oh
- Applicant Address: KR Cheongju-si
- Assignee: MagnaChip Semiconductor, Ltd.
- Current Assignee: MagnaChip Semiconductor, Ltd.
- Current Assignee Address: KR Cheongju-si
- Agency: NSIP Law
- Priority: KR10-2009-0115906 20091127; KR10-2009-0116052 20091127; KR10-2009-0116075 20091127
- Main IPC: H01L21/70
- IPC: H01L21/70

Abstract:
A semiconductor device includes: an active region configured over a substrate to include a first conductive-type first deep well and second conductive-type second deep well forming a junction therebetween. A gate electrode extends across the junction and over a portion of first conductive-type first deep well and a portion of the second conductive-type second deep well. A second conductive-type source region is in the first conductive-type first deep well at one side of the gate electrode whereas a second conductive-type drain region is in the second conductive-type second deep well on another side of the gate electrode. A first conductive-type impurity region is in the first conductive-type first deep well surrounding the second conductive-type source region and extending toward the junction so as to partially overlap with the gate electrode and/or partially overlap with the second conductive-type source region.
Public/Granted literature
- US20110127612A1 SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING SEMICONDUCTOR DEVICE Public/Granted day:2011-06-02
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