Invention Grant
- Patent Title: Calibration method and circuit
- Patent Title (中): 校准方法和电路
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Application No.: US13310932Application Date: 2011-12-05
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Publication No.: US08576102B2Publication Date: 2013-11-05
- Inventor: Chandrajit Debnath , Pratap Narayan Singh
- Applicant: Chandrajit Debnath , Pratap Narayan Singh
- Applicant Address: NL Amsterdam
- Assignee: STMicroelectronics International N.V.
- Current Assignee: STMicroelectronics International N.V.
- Current Assignee Address: NL Amsterdam
- Agency: Gardere Wynne Sewell LLP
- Main IPC: H03M1/10
- IPC: H03M1/10

Abstract:
An analog input signal is sampled, and the sampled analog input signal is converted to a digital value. A calibration value is also sampled, and a single bit of an N bit offset value is calculated from the sampled calibration value. The sampling operations are alternatively performed so that one bit of the offset value is generated for each generated digital value. For example, the process is repeated N times to calculate all N bits of the offset value while generating N digital values.
Public/Granted literature
- US20130141263A1 CALIBRATION METHOD AND CIRCUIT Public/Granted day:2013-06-06
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