发明授权
US08576644B2 Memory devices having controllers that divide command signals into two signals and systems including such memory devices 有权
具有将命令信号分成两个信号的控制器的存储器件和包括这种存储器件的系统

Memory devices having controllers that divide command signals into two signals and systems including such memory devices
摘要:
A memory device using error correcting code and a system including the same are provided. The memory device includes a memory cell array including a plurality of bit lines and a plurality of memory cells; an access block for accessing the memory cell array; and a controller block for receiving a first operation command signal, dividing the first operation command signal into at least two paths pulse signals corresponding to at least two paths, based on a pre-determined criterion, and then supplying the at least two path pulse signals to the access block. The access block operates based on an output signal of the controller block.
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