Invention Grant
- Patent Title: Top exposed package and assembly method
- Patent Title (中): 顶部暴露的包装和装配方法
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Application No.: US12968159Application Date: 2010-12-14
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Publication No.: US08586414B2Publication Date: 2013-11-19
- Inventor: Yan Xun Xue , Yueh-Se Ho , Hamza Yilmaz , Anup Bhalla , Jun Lu , Kal Liu
- Applicant: Yan Xun Xue , Yueh-Se Ho , Hamza Yilmaz , Anup Bhalla , Jun Lu , Kal Liu
- Applicant Address: US CA Sunnyvale
- Assignee: Alpha & Omega Semiconductor, Inc.
- Current Assignee: Alpha & Omega Semiconductor, Inc.
- Current Assignee Address: US CA Sunnyvale
- Agency: C H Emily LLC
- Agent Chein-Hwa Tsao
- Main IPC: H01L21/00
- IPC: H01L21/00
Abstract:
A semiconductor package and it manufacturing method includes a lead frame having a die pad, and a source lead with substantially a V groove disposed on a top surface. A semiconductor chip disposed on the die pad. A metal plate connected to a top surface electrode of the chip having a bent extension terminated in the V groove in contact with at least one of the V groove sidewalls.
Public/Granted literature
- US20120146202A1 Top exposed Package and Assembly Method Public/Granted day:2012-06-14
Information query
IPC分类:
