Invention Grant
US08586450B2 Process for fabricating semiconductor devices and a semiconductor device comprising a chip with through-vias
有权
用于制造半导体器件的工艺和包括具有贯通孔的芯片的半导体器件
- Patent Title: Process for fabricating semiconductor devices and a semiconductor device comprising a chip with through-vias
- Patent Title (中): 用于制造半导体器件的工艺和包括具有贯通孔的芯片的半导体器件
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Application No.: US13103191Application Date: 2011-05-09
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Publication No.: US08586450B2Publication Date: 2013-11-19
- Inventor: Eric Saugier
- Applicant: Eric Saugier
- Applicant Address: FR Grenoble
- Assignee: STMicroelectronics (Grenoble 2) SAS
- Current Assignee: STMicroelectronics (Grenoble 2) SAS
- Current Assignee Address: FR Grenoble
- Agency: Gardere Wynne Sewell LLP
- Priority: FR1053784 20100517
- Main IPC: H01L21/30
- IPC: H01L21/30

Abstract:
A semiconductor device includes a first wafer having at least one first integrated-circuit chip and a first support layer surrounding the first integrated circuit chip. A first electrical-connection layer is placed on a frontside of the first wafer and includes a first electrical-connection network. A second wafer is placed on a frontside of the first electrical-connection layer. The second wafer includes at least one second integrated-circuit chip and a second support layer surrounding the second integrate circuit chip. The second integrated circuit chip has an active side facing the first electrical-connection layer, and one or more through-holes filled with a conductor forming electrical-connection vias. A second electrical-connection layer is placed on the backside of the second wafer and includes a second electrical-connection network.
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