Invention Grant
US08592891B1 Methods for fabricating semiconductor memory with process induced strain
有权
用工艺诱导应变制造半导体存储器的方法
- Patent Title: Methods for fabricating semiconductor memory with process induced strain
- Patent Title (中): 用工艺诱导应变制造半导体存储器的方法
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Application No.: US13539463Application Date: 2012-07-01
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Publication No.: US08592891B1Publication Date: 2013-11-26
- Inventor: Igor Polishchuk , Sagy Levy , Krishnaswamy Ramkumar , Jeong Byun
- Applicant: Igor Polishchuk , Sagy Levy , Krishnaswamy Ramkumar , Jeong Byun
- Applicant Address: US CA San Jose
- Assignee: Cypress Semiconductor Corp.
- Current Assignee: Cypress Semiconductor Corp.
- Current Assignee Address: US CA San Jose
- Main IPC: H01L29/76
- IPC: H01L29/76

Abstract:
A semiconductor device and method of fabricating the same are provided. In one embodiment, the semiconductor device includes a memory transistor with an oxide-nitride-nitride-oxide (ONNO) stack disposed above a channel region. The ONNO stack comprises a tunnel dielectric layer disposed above the channel region, a multi-layer charge-trapping region disposed above the tunnel dielectric layer, and a blocking dielectric layer disposed above the multi-layer charge-trapping region. The multi-layer charge-trapping region includes a substantially trap-free layer comprising an oxygen-rich nitride and a trap-dense layer disposed above the trap-free layer. The semiconductor device further includes a strain inducing structure including a strain inducing layer disposed proximal to the ONNO stack to increase charge retention of the multi-layer charge-trapping region. Other embodiments are also disclosed.
Information query
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