Invention Grant
- Patent Title: Multiple-modulus divider and associated control method
- Patent Title (中): 多模分频器及相关控制方法
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Application No.: US13556392Application Date: 2012-07-24
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Publication No.: US08599997B2Publication Date: 2013-12-03
- Inventor: Yen-Tso Chen , Jian-Yu Ding
- Applicant: Yen-Tso Chen , Jian-Yu Ding
- Applicant Address: TW Hsinchu
- Assignee: MStar Semiconductor, Inc.
- Current Assignee: MStar Semiconductor, Inc.
- Current Assignee Address: TW Hsinchu
- Agency: WPAT, PC
- Agent Justin King
- Priority: TW100127102 20110729
- Main IPC: H03K21/00
- IPC: H03K21/00 ; H03K23/00

Abstract:
A multiple-modulus divider and an associated control method are provided. The multiple-modulus divider includes a divisor loader, a multiple-modulus dividing circuit and a modulus controller. The divisor loader downloads a divisor when a download signal indicates a start of a division period. The multiple-modulus circuit includes a plurality of cascaded divisors, and provides an output frequency according to an input frequency and the divisor. The dividers respectively output a plurality of modulus output signals, and each is operable under either a close-loop state or an open-loop state. The modulus controller selects and controls one of the dividers according to the divisor, and ensures the selected divider is maintained at the open-loop state when the division period ends. The download signal corresponds to one of the modulus output signals.
Public/Granted literature
- US20130027111A1 MULTIPLE-MODULUS DIVIDER AND ASSOCIATED CONTROL METHOD Public/Granted day:2013-01-31
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