发明授权
- 专利标题: Extended register addressing using prefix instruction
- 专利标题(中): 使用前缀指令进行扩展寄存器寻址
-
申请号: US12827238申请日: 2010-06-30
-
公开(公告)号: US08601239B2公开(公告)日: 2013-12-03
- 发明人: Toshio Yoshida , Yasunobu Akizuki , Ryuichi Sunayama
- 申请人: Toshio Yoshida , Yasunobu Akizuki , Ryuichi Sunayama
- 申请人地址: JP Kawasaki
- 专利权人: Fujitsu Limited
- 当前专利权人: Fujitsu Limited
- 当前专利权人地址: JP Kawasaki
- 代理机构: Staas & Halsey LLP
- 优先权: JP2009-156374 20090630
- 主分类号: G06F9/30
- IPC分类号: G06F9/30
摘要:
A processor includes a storage unit storing an instruction, an instruction extension information register that includes a first area and a second area, an instruction decoding unit that decodes a first prefix instruction including first extension information extending an immediately following instruction written to the first area when the first prefix instruction is executed, and that decodes a second prefix instruction including the first extension information and a second extension information extending an instruction immediately following two instructions of the second prefix instruction, an instruction packing unit that generates a packed instruction including at least one of the first prefix instruction or the second prefix instruction, and the instruction immediately following the first prefix instruction or the second prefix instruction when the instruction decoding unit decodes the first prefix instruction or the second prefix instruction, an instruction execution unit that executes the packed instruction generated by the instruction packing unit.
公开/授权文献
- US20100332803A1 PROCESSOR AND CONTROL METHOD FOR PROCESSOR 公开/授权日:2010-12-30