发明授权
- 专利标题： Methods for fabricating integrated circuits having substrate contacts and integrated circuits having substrate contacts
- 专利标题（中）： 具有基板触点的集成电路的制造方法和具有基板触点的集成电路
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申请号： US13436323申请日： 2012-03-30
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公开(公告)号： US08609533B2公开(公告)日： 2013-12-17
- 发明人: Thilo Scheiper , Stefan Flachowsky , Jan Hoentschel
- 申请人： Thilo Scheiper , Stefan Flachowsky , Jan Hoentschel
- 申请人地址： KY Grand Cayman
- 专利权人： GLOBALFOUNDRIES, Inc.
- 当前专利权人： GLOBALFOUNDRIES, Inc.
- 当前专利权人地址： KY Grand Cayman
- 代理机构： Ingrassia Fisher & Lorenz, P.C.
- 主分类号： H01L21/311
- IPC分类号： H01L21/311 ; H01L21/314 ; H01L21/3205 ; H01L21/4763
摘要：
Methods for fabricating integrated circuits having substrate contacts and integrated circuits having substrate contacts are provided. One method includes forming a first trench in a SOI substrate extending through a buried insulating layer to a silicon substrate. A metal silicide region is formed in the silicon substrate exposed by the first trench. A first stress-inducing layer is formed overlying the metal silicide region. A second stress-inducing layer is formed overlying the first stress-inducing layer. An ILD layer of dielectric material is formed overlying the second stress-inducing layer. A second trench is formed extending through the ILD layer and the first and second stress-inducing layers to the metal silicide region. The second trench is filled with a conductive material.
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