发明授权
- 专利标题: Integrated apparatus to assure wafer quality and manufacturability
- 专利标题(中): 集成设备,确保晶圆质量和可制造性
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申请号: US12869171申请日: 2010-08-26
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公开(公告)号: US08616821B2公开(公告)日: 2013-12-31
- 发明人: Shao-Yen Ku , Chi-Ming Yang , Ming-Tsao Chiang , Yu-Fen Tzeng , Chin-Hsiang Lin
- 申请人: Shao-Yen Ku , Chi-Ming Yang , Ming-Tsao Chiang , Yu-Fen Tzeng , Chin-Hsiang Lin
- 申请人地址: TW Hsin-Chu
- 专利权人: Taiwan Semiconductor Manufacturing Company, Ltd.
- 当前专利权人: Taiwan Semiconductor Manufacturing Company, Ltd.
- 当前专利权人地址: TW Hsin-Chu
- 代理机构: Haynes and Boone, LLP
- 主分类号: H01L21/67
- IPC分类号: H01L21/67 ; H01L21/677
摘要:
The present disclosure provides a system and method for processing a semiconductor substrate wherein a substrate is received at a load lock interface. The substrate is transferred from the load lock interface to a process module using a first module configured for unprocessed substrates. A manufacturing process is performed on the substrate within the process module. Thereafter, the substrate is transferred from the process module to the load lock interface using a second module configured for processed substrates.
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