发明授权
- 专利标题： Vertical transistor with hardening implatation
- 专利标题（中）： 垂直晶体管与硬化插入
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申请号： US12891966申请日： 2010-09-28
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公开(公告)号： US08617952B2公开(公告)日： 2013-12-31
- 发明人: Young Pil Kim , Hyung-Kew Lee , Peter Nicholas Manos , Chulmin Jung , Maroun Georges Khoury , Dadi Setiadi
- 申请人： Young Pil Kim , Hyung-Kew Lee , Peter Nicholas Manos , Chulmin Jung , Maroun Georges Khoury , Dadi Setiadi
- 申请人地址： US CA Cupertino
- 专利权人： Seagate Technology LLC
- 当前专利权人： Seagate Technology LLC
- 当前专利权人地址： US CA Cupertino
- 代理机构： Mueting Raasch & Gebhardt
- 主分类号： H01L21/336
- IPC分类号： H01L21/336
摘要：
A method includes providing a semiconductor wafer having a plurality of pillar structures extending orthogonally from the semiconductor wafer. Each pillar structure forms a vertical pillar transistor having a top surface and a side surface orthogonal to the top surface. Then a hardening species is implanted into the vertical pillar transistor top surface. Then the vertical pillar transistor side surface is oxidized to form a side surface oxide layer. The side surface oxide layer is removed to form vertical pillar transistor having rounded side surfaces.
公开/授权文献
- US20120074488A1 VERTICAL TRANSISTOR WITH HARDENING IMPLATATION 公开/授权日：2012-03-29
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