Invention Grant
US08621403B2 Timing closure methodology including placement with initial delay values
有权
定时关闭方法，包括具有初始延迟值的位置
- Patent Title: Timing closure methodology including placement with initial delay values
- Patent Title (中): 定时关闭方法，包括具有初始延迟值的位置
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Application No.: US10828547Application Date: 2004-04-19
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Publication No.: US08621403B2Publication Date: 2013-12-31
- Inventor: Lukas P. P. P. van Ginneken , Prabhakar Kudva
- Applicant: Lukas P. P. P. van Ginneken , Prabhakar Kudva
- Applicant Address: US CA Mountain View US NY Armonk
- Assignee: Synopsys, Inc.,International Business Machines Corporation
- Current Assignee: Synopsys, Inc.,International Business Machines Corporation
- Current Assignee Address: US CA Mountain View US NY Armonk
- Agency: Fenwick & West LLP
- Main IPC: G06F17/50
- IPC: G06F17/50
Abstract:
An automated method for designing an integrated circuit layout using a computer based upon an electronic circuit description and based upon cells which are selected from a cell library, each of the cells having an associated area, comprising the steps of: (a) placing each of the cells in the integrated circuit layout so that the cells can be coupled together by wires to form a circuit path having an associated predetermined delay constraint wherein the cells are coupled together based upon the electronic circuit description input to the computer; (b) connecting the cells together with the wires to form the circuit path; and (c) adjusting an area of at least one of the cells to satisfy the associated predetermined delay constraint of the circuit path.
Public/Granted literature
- US20050120319A1 Timing closure methodology Public/Granted day:2005-06-02
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