Invention Grant
- Patent Title: System and method for reducing layout-dependent effects
- Patent Title (中): 减少与布局有关的影响的系统和方法
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Application No.: US13459288Application Date: 2012-04-30
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Publication No.: US08621409B2Publication Date: 2013-12-31
- Inventor: Hui Yu Lee , Feng Wei Kuo , Ching-Shun Yang , Yi-Kan Cheng , Jui-Feng Kuan
- Applicant: Hui Yu Lee , Feng Wei Kuo , Ching-Shun Yang , Yi-Kan Cheng , Jui-Feng Kuan
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Duane Morris LLP
- Main IPC: G06F17/50
- IPC: G06F17/50

Abstract:
A method includes extracting a first netlist from a first layout of a semiconductor circuit and estimating layout-dependent effect data based on the first netlist. A first simulation of the semiconductor circuit is performed based on the first netlist using an electronic design automation tool, and a second simulation of the semiconductor circuit is performed based on a circuit schematic using the electronic design automation tool. A weight and a sensitivity of the at least one layout-dependent effect are calculated, and the first layout of the semiconductor circuit is adjusted based on the weight and the sensitivity to provide a second layout of the semiconductor circuit. The second layout is stored in a non-transient storage medium.
Public/Granted literature
- US20130290916A1 SYSTEM AND METHOD FOR REDUCING LAYOUT-DEPENDENT EFFECTS Public/Granted day:2013-10-31
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