发明授权
- 专利标题： Electrical connection for chip scale packaging
- 专利标题（中）： 电子连接用于芯片级包装
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申请号： US13152734申请日： 2011-06-03
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公开(公告)号： US08624392B2公开(公告)日： 2014-01-07
- 发明人: Ming-Chih Yew , Fu-Jen Li , Po-Yao Lin , Chia-Jen Cheng , Hsiu-Mei Yu
- 申请人： Ming-Chih Yew , Fu-Jen Li , Po-Yao Lin , Chia-Jen Cheng , Hsiu-Mei Yu
- 申请人地址： TW Hsin-Chu
- 专利权人： Taiwan Semiconductor Manufacturing Company, Ltd.
- 当前专利权人： Taiwan Semiconductor Manufacturing Company, Ltd.
- 当前专利权人地址： TW Hsin-Chu
- 代理机构： Slater & Matsil, L.L.P.
- 主分类号： H01L23/485
- IPC分类号： H01L23/485
摘要：
A system and method for providing a post-passivation and underbump metallization is provided. An embodiment comprises a post-passivation layer that is larger than an overlying underbump metallization. The post-passivation layer extending beyond the underbump metallization shields the underlying layers from stresses generated from mismatches of the materials' coefficient of thermal expansion.
公开/授权文献
- US20120306070A1 Electrical Connection for Chip Scale Packaging 公开/授权日：2012-12-06
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