Invention Grant
- Patent Title: Scan latch with phase-free scan enable
- Patent Title (中): 扫描锁存器,无相位扫描使能
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Application No.: US13672285Application Date: 2012-11-08
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Publication No.: US08635503B2Publication Date: 2014-01-21
- Inventor: Bo Tang , Edgardo F. Klass
- Applicant: Apple Inc.
- Applicant Address: US CA Cupertino
- Assignee: Apple Inc.
- Current Assignee: Apple Inc.
- Current Assignee Address: US CA Cupertino
- Agency: Meyertons, Hood, Kivlin, Kowert & Goetzel, P.C.
- Agent Lawrence J. Merkel; Erik A. Heter
- Main IPC: G01R31/28
- IPC: G01R31/28

Abstract:
A number of scan flops clocked by a master clock may be used to constructing a scan chain to perform scan tests. During a scan test, data appearing at the regular data input of each scan flop may be written into a master latch of the scan flop during a time period when the scan control signal is in a state corresponding to a capture cycle. A slave latch in each scan flop may latch a value appearing at the regular data input of the scan flop according to a narrow pulse triggered by the rising edge of the master clock when the scan control signal is in the state corresponding to the capture cycle. The slave latch may latch the data provided by the master latch according to a wide pulse triggered by the rising edge of the master clock when the scan control signal is in a state corresponding to a shift cycle. This may permit toggling the scan control signal during either a high phase or a low phase of the master clock, and may also enable testing the pulse functionality of each scan flop.
Public/Granted literature
- US20130067292A1 Scan Latch with Phase-Free Scan Enable Public/Granted day:2013-03-14
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