发明授权
US08648424B2 Semiconductor device including transistors having embedded source/drain regions each including upper and lower main layers comprising germanium
有权
半导体器件包括具有嵌入的源/漏区的晶体管,每个晶体管包括包含锗的上和下主层
- 专利标题: Semiconductor device including transistors having embedded source/drain regions each including upper and lower main layers comprising germanium
- 专利标题(中): 半导体器件包括具有嵌入的源/漏区的晶体管,每个晶体管包括包含锗的上和下主层
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申请号: US13600375申请日: 2012-08-31
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公开(公告)号: US08648424B2公开(公告)日: 2014-02-11
- 发明人: Hoi-Sung Chung , Dong-Hyuk Kim , Myung-Sun Kim , Dong-Suk Shin
- 申请人: Hoi-Sung Chung , Dong-Hyuk Kim , Myung-Sun Kim , Dong-Suk Shin
- 申请人地址: KR Suwon-si, Gyeonggi-do
- 专利权人: Samsung Electronics Co., Ltd.
- 当前专利权人: Samsung Electronics Co., Ltd.
- 当前专利权人地址: KR Suwon-si, Gyeonggi-do
- 代理机构: Volentine & Whitt, PLLC
- 优先权: KR10-2011-0142390 20111226
- 主分类号: H01L21/70
- IPC分类号: H01L21/70
摘要:
A semiconductor device includes a substrate having a channel region, a gate insulation layer on the channel region, a gate electrode on the gate insulation layer, and source and drain regions in recesses in the substrate on both sides of the channel region, respectively. The source and drain regions include a lower main layer whose bottom surface is located at level above the bottom of a recess and lower than that of the bottom surface of the gate insulation layer, and a top surface no higher than the level of the bottom surface of the gate insulation layer, and an upper main layer contacting the lower main layer and whose top surface extends to a level higher than that of the bottom surface of the gate insulation layer, and in which the lower layer has a Ge content higher than that of the upper layer.
公开/授权文献
- US20130161751A1 SEMICONDUCTOR DEVICE INCLUDING TRANSISTORS 公开/授权日:2013-06-27
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