Invention Grant
- Patent Title: Dynamic configuration of potential links between processing elements
- Patent Title (中): 处理元件之间的潜在链接的动态配置
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Application No.: US12241619Application Date: 2008-09-30
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Publication No.: US08649262B2Publication Date: 2014-02-11
- Inventor: Sadagopan Srinivasan , Michael W. Leddige , Bin Li , Michael Espig
- Applicant: Sadagopan Srinivasan , Michael W. Leddige , Bin Li , Michael Espig
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Buckley, Maschoff & Talwalkar LLC
- Main IPC: H04L12/26
- IPC: H04L12/26

Abstract:
According to some embodiments, first and second processing elements may be provided on a die, and there may be a plurality of potential communication links between the first and second processing elements. Moreover, control logic may be provided on the die to dynamically activate at least some of the potential communication links (e.g., based on a current bandwidth appropriate between the first and second processing elements).
Public/Granted literature
- US20100080132A1 DYNAMIC CONFIGURATION OF POTENTIAL LINKS BETWEEN PROCESSING ELEMENTS Public/Granted day:2010-04-01
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