发明授权
US08652956B2 High-k metal gate electrode structures formed by separate removal of placeholder materials using a masking regime prior to gate patterning
有权
通过在栅极图案化之前使用掩模状态分开去除占位符材料而形成的高k金属栅电极结构
- 专利标题： High-k metal gate electrode structures formed by separate removal of placeholder materials using a masking regime prior to gate patterning
- 专利标题（中）： 通过在栅极图案化之前使用掩模状态分开去除占位符材料而形成的高k金属栅电极结构
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申请号： US13533807申请日： 2012-06-26
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公开(公告)号： US08652956B2公开(公告)日： 2014-02-18
- 发明人: Sven Beyer , Klaus Hempel , Thilo Scheiper , Stefanie Steiner
- 申请人： Sven Beyer , Klaus Hempel , Thilo Scheiper , Stefanie Steiner
- 申请人地址： KY Grand Cayman
- 专利权人： GLOBALFOUNDRIES Inc.
- 当前专利权人： GLOBALFOUNDRIES Inc.
- 当前专利权人地址： KY Grand Cayman
- 代理机构： Amerson Law Firm, PLLC
- 优先权： DE102009047306 20091130
- 主分类号： H01L21/28
- IPC分类号： H01L21/28 ; H01L27/092
摘要：
In a replacement gate approach in sophisticated semiconductor devices, the placeholder material of gate electrode structures of different type are separately removed. Furthermore, electrode metal may be selectively formed in the resulting gate opening, thereby providing superior process conditions in adjusting a respective work function of gate electrode structures of different type. In one illustrative embodiment, the separate forming of gate openings in gate electrode structures of different type may be based on a mask material that is provided in a gate layer stack.
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