Invention Grant
- Patent Title: Integrated circuit comprising a non-dedicated terminal for receiving an erase program high voltage
- Patent Title (中): 集成电路包括用于接收擦除程序高电压的非专用端子
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Application No.: US13706132Application Date: 2012-12-05
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Publication No.: US08654581B2Publication Date: 2014-02-18
- Inventor: Francois Tailliet
- Applicant: STMicroelectronics (Rousset) SAS
- Applicant Address: FR Rousset
- Assignee: STMicroelectronics (Rousset) SAS
- Current Assignee: STMicroelectronics (Rousset) SAS
- Current Assignee Address: FR Rousset
- Agency: Seed IP Law Group PLLC
- Priority: FR0905025 20091020; FR0905026 20091020
- Main IPC: G11C11/34
- IPC: G11C11/34

Abstract:
The disclosure relates to an integrated circuit electrically powered by a supply voltage and comprising a memory electrically erasable and/or programmable by means of a second voltage greater than the supply voltage. The integrated circuit comprises means for receiving the second voltage by the intermediary of a reception terminal of the supply voltage or by the intermediary of a reception or emission terminal of a data or clock signal. Applicable in particular to electronic tags comprising a reduced number of interconnection terminals.
Public/Granted literature
- US20130094306A1 INTEGRATED CIRCUIT COMPRISING A NON-DEDICATED TERMINAL FOR RECEIVING AN ERASE PROGRAM HIGH VOLTAGE Public/Granted day:2013-04-18
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