Invention Grant
- Patent Title: Etch stop layer for memory cell reliability improvement
- Patent Title (中): 蚀刻停止层，提高记忆体的可靠性
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Application No.: US13617291Application Date: 2012-09-14
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Publication No.: US08658496B2Publication Date: 2014-02-25
- Inventor: Hiroyuki Kinoshita , Angela Hui , Hsiao-Han Thio , Kuo-Tung Chang , Minh Van Ngo , Hiroyuki Ogawa
- Applicant: Hiroyuki Kinoshita , Angela Hui , Hsiao-Han Thio , Kuo-Tung Chang , Minh Van Ngo , Hiroyuki Ogawa
- Applicant Address: US CA Sunnyvale US CA Sunnyvale
- Assignee: Advanced Mirco Devices, Inc.,Spansion LLC
- Current Assignee: Advanced Mirco Devices, Inc.,Spansion LLC
- Current Assignee Address: US CA Sunnyvale US CA Sunnyvale
- Agency: Harrity & Harrity, LLP
- Main IPC: H01L21/336
- IPC: H01L21/336
Abstract:
A memory device and a method of making the memory device are provided. A first dielectric layer is formed on a substrate, a floating gate is formed on the first dielectric layer, a second dielectric layer is formed on the floating gate, a control gate is formed on the second dielectric layer, and at least one film, including a conformal film, is formed over a surface of the memory device.
Public/Granted literature
- US20130078795A1 ETCH STOP LAYER FOR MEMORY CELL RELIABILITY IMPROVEMENT Public/Granted day:2013-03-28
Information query
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