发明授权
US08664721B2 FET with FUSI gate and reduced source/drain contact resistance
有权
具有FUSI栅极的FET和降低的源极/漏极接触电阻
- 专利标题： FET with FUSI gate and reduced source/drain contact resistance
- 专利标题（中）： 具有FUSI栅极的FET和降低的源极/漏极接触电阻
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申请号： US13569741申请日： 2012-08-08
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公开(公告)号： US08664721B2公开(公告)日： 2014-03-04
- 发明人: Christian Lavoie , Tak H. Ning , Qiqing Ouyang , Paul Solomon , Zhen Zhang
- 申请人： Christian Lavoie , Tak H. Ning , Qiqing Ouyang , Paul Solomon , Zhen Zhang
- 申请人地址： US NY Armonk
- 专利权人： International Business Machines Corporation
- 当前专利权人： International Business Machines Corporation
- 当前专利权人地址： US NY Armonk
- 代理机构： Cantor Colburn LLP
- 代理商 Louis Percello
- 主分类号： H01L27/12
- IPC分类号： H01L27/12 ; H01L29/45
摘要：
A field effect transistor (FET) includes source/drain silicide regions located in a silicon layer; source/drain interfacial layers located in between the source/drain silicide regions and the silicon layer; and a fully silicided gate stack comprising a gate oxide layer located on the silicon layer, a gate interfacial layer located on the gate oxide layer, and a gate silicide located on the gate interfacial layer.