Invention Grant
US08674336B2 Non-volatile resistive oxide memory cells, non-volatile resistive oxide memory arrays, and methods of forming non-volatile resistive oxide memory cells and memory arrays
有权
非易失性电阻氧化物存储单元，非易失性电阻氧化物存储器阵列以及形成非易失性电阻氧化物存储器单元和存储器阵列的方法
- Patent Title: Non-volatile resistive oxide memory cells, non-volatile resistive oxide memory arrays, and methods of forming non-volatile resistive oxide memory cells and memory arrays
- Patent Title (中): 非易失性电阻氧化物存储单元，非易失性电阻氧化物存储器阵列以及形成非易失性电阻氧化物存储器单元和存储器阵列的方法
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Application No.: US13231667Application Date: 2011-09-13
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Publication No.: US08674336B2Publication Date: 2014-03-18
- Inventor: John Smythe , Bhaskar Srinivasan , Gurtej S. Sandhu
- Applicant: John Smythe , Bhaskar Srinivasan , Gurtej S. Sandhu
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Wells St. John, P.S.
- Main IPC: H01L45/00
- IPC: H01L45/00
Abstract:
A method of forming a non-volatile resistive oxide memory cell includes forming a first conductive electrode of the memory cell as part of a substrate. Insulative material is deposited over the first electrode. An opening is formed into the insulative material over the first electrode. The opening includes sidewalls and a base. The opening sidewalls and base are lined with a multi-resistive state layer comprising multi-resistive state metal oxide-comprising material which less than fills the opening. A second conductive electrode of the memory cell is formed within the opening laterally inward of the multi-resistive state layer lining the sidewalls and elevationally over the multi-resistive state layer lining the base. Other aspects and implementations are contemplated.
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