公开(公告)号：US09343665B2

公开(公告)日：2016-05-17

申请号：US12166604

申请日：2008-07-02

申请人： Nishant Sinha ,  John Smythe ,  Bhaskar Srinivasan ,  Gurtej S. Sandhu ,  Joseph Neil Greeley ,  Kunal R. Parekh

发明人： Nishant Sinha ,  John Smythe ,  Bhaskar Srinivasan ,  Gurtej S. Sandhu ,  Joseph Neil Greeley ,  Kunal R. Parekh

IPC分类号： H01L45/00 ,  H01L27/24

CPC分类号： H01L45/1683 ,  H01L27/2472 ,  H01L45/04 ,  H01L45/085 ,  H01L45/1233 ,  H01L45/1266 ,  H01L45/146 ,  H01L45/147 ,  H01L45/16

摘要： A method of forming a non-volatile resistive oxide memory cell includes forming a first conductive electrode of the memory cell as part of a substrate. Metal oxide-comprising material is formed over the first conductive electrode. Etch stop material is deposited over the metal oxide-comprising material. Conductive material is deposited over the etch stop material. A second conductive electrode of the memory cell which comprises the conductive material received is formed over the etch stop material. Such includes etching through the conductive material to stop relative to the etch stop material and forming the non-volatile resistive oxide memory cell to comprise the first and second conductive electrodes having both the metal oxide-comprising material and the etch stop material therebetween. Other implementations are contemplated.

摘要翻译： 形成非易失性电阻氧化物存储单元的方法包括：形成存储单元的第一导电电极作为衬底的一部分。 含金属氧化物的材料形成在第一导电电极上。 蚀刻停止材料沉积在包含金属氧化物的材料上。 导电材料沉积在蚀刻停止材料上。 包含所接收的导电材料的存储单元的第二导电电极形成在蚀刻停止材料上。 这样包括通过导电材料蚀刻以相对于蚀刻停止材料停止并且形成非易失性电阻氧化物存储单元，以包括具有包含金属氧化物的材料和其间的蚀刻停止材料的第一和第二导电电极。 考虑其他实现。

公开(公告)号：US08940388B2

公开(公告)日：2015-01-27

申请号：US13038605

申请日：2011-03-02

申请人： Vassil Antonov ,  Jennifer K. Sigman ,  Vishwanath Bhat ,  Matthew N. Rocklein ,  Bhaskar Srinivasan ,  Chris Carlson

发明人： Vassil Antonov ,  Jennifer K. Sigman ,  Vishwanath Bhat ,  Matthew N. Rocklein ,  Bhaskar Srinivasan ,  Chris Carlson

IPC分类号： B32B7/02 ,  H01G4/33 ,  H01G4/30 ,  H01G4/12

CPC分类号： H01L28/40 ,  H01G4/1209 ,  H01G4/1218 ,  H01G4/1236 ,  H01G4/1254 ,  H01G4/1272 ,  H01G4/306 ,  H01G4/33 ,  H01L21/02172 ,  H01L21/02356 ,  H01L21/225 ,  Y10T428/2495

摘要： Methods of forming an insulative element are described, including forming a first metal oxide material having a first dielectric constant, forming a second metal oxide material having a second dielectric constant different from the first, and heating at least portions of the structure to crystallize at least a portion of at least one of the first dielectric material and the second dielectric material. Methods of forming a capacitor are described, including forming a first electrode, forming a dielectric material with a first oxide and a second oxide over the first electrode, and forming a second electrode over the dielectric material. Structures including dielectric materials are also described.

摘要翻译： 描述了形成绝缘元件的方法，包括形成具有第一介电常数的第一金属氧化物材料，形成具有与第一介电常数不同的第二介电常数的第二金属氧化物材料，并加热该结构的至少部分至少结晶 第一电介质材料和第二电介质材料中的至少一个的一部分。 描述了形成电容器的方法，包括形成第一电极，在第一电极上形成具有第一氧化物和第二氧化物的介电材料，以及在电介质材料上形成第二电极。 还描述了包括电介质材料的结构。

公开(公告)号：US08686411B2

公开(公告)日：2014-04-01

申请号：US13837736

申请日：2013-03-15

申请人： Neil Greeley ,  Bhaskar Srinivasan ,  Gurtej Sandhu ,  John Smythe

发明人： Neil Greeley ,  Bhaskar Srinivasan ,  Gurtej Sandhu ,  John Smythe

IPC分类号： H01L29/06

CPC分类号： H01L27/2481 ,  H01L27/2409 ,  H01L27/2463 ,  H01L27/2472 ,  H01L45/06 ,  H01L45/085 ,  H01L45/12 ,  H01L45/1233 ,  H01L45/143 ,  H01L45/144 ,  H01L45/1608 ,  H01L45/165 ,  H01L45/1658 ,  H01L45/1683

摘要： Self-aligning fabrication methods for forming memory access devices comprising a doped chalcogenide material. The methods may be used for forming three-dimensionally stacked cross point memory arrays. The method includes forming an insulating material over a first conductive electrode, patterning the insulating material to form vias that expose portions of the first conductive electrode, forming a memory access device within the vias of the insulating material and forming a memory element over the memory access device, wherein data stored in the memory element is accessible via the memory access device. The memory access device is formed of a doped chalcogenide material and formed using a self-aligned fabrication method.

公开(公告)号：US08455299B2

公开(公告)日：2013-06-04

申请号：US13608992

申请日：2012-09-10

申请人： John Smythe ,  Bhaskar Srinivasan ,  Ming Zhang

发明人： John Smythe ,  Bhaskar Srinivasan ,  Ming Zhang

IPC分类号： H01L21/06 ,  H01L21/336 ,  H01L21/00

CPC分类号： H01L29/66136 ,  H01L21/26513 ,  H01L21/268 ,  H01L21/324 ,  H01L21/823425 ,  H01L21/823814 ,  H01L27/10873 ,  H01L27/24 ,  H01L29/665 ,  H01L29/6659

摘要： Some embodiments include methods in which microwave radiation is used to activate dopant and/or increase crystallinity of semiconductor material during formation of a semiconductor construction. In some embodiments, the microwave radiation has a frequency of about 5.8 gigahertz, and a temperature of the semiconductor construction does not exceed about 500° C. during the exposure to the microwave radiation.

摘要翻译： 一些实施例包括在形成半导体结构期间使用微波辐射来激活掺杂剂和/或增加半导体材料的结晶度的方法。 在一些实施例中，微波辐射具有约5.8千兆赫的频率，并且在暴露于微波辐射期间半导体构造的温度不超过约500℃。

公开(公告)号：US20120241911A1

公开(公告)日：2012-09-27

申请号：US13491165

申请日：2012-06-07

申请人： Neil Greeley ,  Bhaskar Srinivasan ,  Gurtej Sandhu ,  John Smythe

发明人： Neil Greeley ,  Bhaskar Srinivasan ,  Gurtej Sandhu ,  John Smythe

IPC分类号： H01L29/24

CPC分类号： H01L27/2481 ,  H01L27/2409 ,  H01L27/2463 ,  H01L27/2472 ,  H01L45/06 ,  H01L45/085 ,  H01L45/12 ,  H01L45/1233 ,  H01L45/143 ,  H01L45/144 ,  H01L45/1608 ,  H01L45/165 ,  H01L45/1658 ,  H01L45/1683

摘要： Self-aligning fabrication methods for forming memory access devices comprising a doped chalcogenide material. The methods may be used for forming three-dimensionally stacked cross point memory arrays. The method includes forming an insulating material over a first conductive electrode, patterning the insulating material to form vias that expose portions of the first conductive electrode, forming a memory access device within the vias of the insulating material and forming a memory element over the memory access device, wherein data stored in the memory element is accessible via the memory access device. The memory access device is formed of a doped chalcogenide material and formed using a self-aligned fabrication method.

摘要翻译： 用于形成包含掺杂的硫族化物材料的存储器存取装置的自对准制造方法。 该方法可用于形成三维堆叠的交叉点存储器阵列。 该方法包括在第一导电电极上形成绝缘材料，图案化绝缘材料以形成暴露第一导电电极的部分的通孔，在绝缘材料的通孔内形成存储器访问装置，并在存储器访问上形成存储元件 设备，其中存储在所述存储器元件中的数据可经由所述存储器访问设备访问。 存储器存取装置由掺杂的硫族化物材料形成，并使用自对准制造方法形成。

公开(公告)号：US20120122292A1

公开(公告)日：2012-05-17

申请号：US13354163

申请日：2012-01-19

申请人： Gurtej Sandhu ,  John Smythe ,  Bhaskar Srinivasan

发明人： Gurtej Sandhu ,  John Smythe ,  Bhaskar Srinivasan

IPC分类号： H01L21/02

CPC分类号： H01L27/101 ,  H01L21/0271 ,  Y10S438/947

摘要： A method of forming a non-volatile resistive oxide memory array includes forming a plurality of one of conductive word lines or conductive bit lines over a substrate. Metal oxide-comprising material is formed over the plurality of said one of the word lines or bit lines. A series of elongated trenches is provided over the plurality of said one of the word lines or bit lines. A plurality of self-assembled block copolymer lines is formed within individual of the trenches in registered alignment with and between the trench sidewalls. A plurality of the other of conductive word lines or conductive bit lines is provided from said plurality of self-assembled block copolymer lines to form individually programmable junctions comprising said metal oxide-comprising material where the word lines and bit lines cross one another.

摘要翻译： 形成非易失性电阻氧化物存储器阵列的方法包括在衬底上形成多个导电字线或导电位线。 含金属氧化物的材料形成在多条所述一条字线或位线中。 在多个所述一条字线或位线之间提供一系列细长的沟槽。 多个自组装嵌段共聚物线形成在沟槽中的各个内，与沟槽侧壁之间对准并且在沟槽侧壁之间形成。 从所述多个自组装嵌段共聚物线路提供多个导电字线或导电位线，以形成包含所述金属氧化物的材料的单独可编程的结，其中字线和位线彼此交叉。

公开(公告)号：US20120112185A1

公开(公告)日：2012-05-10

申请号：US13352833

申请日：2012-01-18

申请人： Gurtej Sandhu ,  Bhaskar Srinivasan

发明人： Gurtej Sandhu ,  Bhaskar Srinivasan

IPC分类号： H01L29/12 ,  H01L21/329

CPC分类号： H01L29/24 ,  H01L27/24 ,  H01L45/00

摘要： A diode and memory device including the diode, where the diode includes a conductive portion and another portion formed of a first material that has characteristics allowing a first decrease in a resistivity of the material upon application of a voltage to the material, thereby allowing current to flow there through, and has further characteristics allowing a second decrease in the resistivity of the first material in response to an increase in temperature of the first material.

摘要翻译： 包括二极管的二极管和存储器件，其中二极管包括导电部分和由第一材料形成的另一部分，该第一材料具有允许在向材料施加电压时第一次降低材料的电阻率的特性，从而允许电流 流过其中，并且具有允许第一材料的电阻率响应于第一材料的温度升高而第二次降低的特征。

公开(公告)号：US20120001147A1

公开(公告)日：2012-01-05

申请号：US13231667

申请日：2011-09-13

申请人： John Smythe ,  Bhaskar Srinivasan ,  Gurtej Sandhu

发明人： John Smythe ,  Bhaskar Srinivasan ,  Gurtej Sandhu

IPC分类号： H01L45/00

CPC分类号： H01L45/04 ,  G11C11/56 ,  G11C13/00 ,  H01L27/2463 ,  H01L45/1233 ,  H01L45/146 ,  H01L45/147 ,  H01L45/1666

摘要： A method of forming a non-volatile resistive oxide memory cell includes forming a first conductive electrode of the memory cell as part of a substrate. Insulative material is deposited over the first electrode. An opening is formed into the insulative material over the first electrode. The opening includes sidewalls and a base. The opening sidewalls and base are lined with a multi-resistive state layer comprising multi-resistive state metal oxide-comprising material which less than fills the opening. A second conductive electrode of the memory cell is formed within the opening laterally inward of the multi-resistive state layer lining the sidewalls and elevationally over the multi-resistive state layer lining the base. Other aspects and implementations are contemplated.

摘要翻译： 形成非易失性电阻氧化物存储单元的方法包括：形成存储单元的第一导电电极作为衬底的一部分。 绝缘材料沉积在第一电极上。 在第一电极上形成绝缘材料的开口。 开口包括侧壁和底座。 开口侧壁和基底衬有包含少于填充开口的多电阻态金属氧化物材料的多电阻状态层。 存储单元的第二导电电极形成在多个电阻状态层的横向内侧的开口的内部，该电阻层衬在侧壁上并且在衬底基底上的多电阻状态层上。 考虑了其他方面和实现。

公开(公告)号：US08080460B2

公开(公告)日：2011-12-20

申请号：US12323978

申请日：2008-11-26

申请人： Gurtej S. Sandhu ,  Bhaskar Srinivasan

发明人： Gurtej S. Sandhu ,  Bhaskar Srinivasan

IPC分类号： H01L21/8222

CPC分类号： H01L21/04 ,  H01L27/1021 ,  H01L27/2418 ,  H01L29/1606 ,  H01L45/00

摘要： Some embodiments include methods of forming diodes. A stack may be formed over a first conductive material. The stack may include, in ascending order, a sacrificial material, at least one dielectric material, and a second conductive material. Spacers may be formed along opposing sidewalls of the stack, and then an entirety of the sacrificial material may be removed to leave a gap between the first conductive material and the at least one dielectric material. In some embodiments of forming diodes, a layer may be formed over a first conductive material, with the layer containing supports interspersed in sacrificial material. At least one dielectric material may be formed over the layer, and a second conductive material may be formed over the at least one dielectric material. An entirety of the sacrificial material may then be removed.

摘要翻译： 一些实施例包括形成二极管的方法。 可以在第一导电材料上形成堆叠。 堆叠可以按升序包括牺牲材料，至少一种电介质材料和第二导电材料。 间隔物可以沿着堆叠的相对侧壁形成，然后可以去除整个牺牲材料以在第一导电材料和至少一个电介质材料之间留下间隙。 在形成二极管的一些实施例中，可以在第一导电材料上形成层，其中包含支撑体的层散布在牺牲材料中。 可以在该层上形成至少一种介电材料，并且可以在该至少一种电介质材料的上方形成第二导电材料。 然后可以去除整个牺牲材料。

公开(公告)号：US20110201200A1

公开(公告)日：2011-08-18

申请号：US13094642

申请日：2011-04-26

申请人： Gurtej S. Sandhu ,  Bhaskar Srinivasan

发明人： Gurtej S. Sandhu ,  Bhaskar Srinivasan

IPC分类号： H01L23/48 ,  H01L21/28

CPC分类号： H01L45/00 ,  Y10S257/91 ,  Y10S438/90 ,  Y10S438/902 ,  Y10S438/983

摘要： Some embodiments include methods of forming diodes. The methods may include oxidation of an upper surface of a conductive electrode to form an oxide layer over the conductive electrode. In some embodiments, the methods may include formation of an oxidizable material over a conductive electrode, and subsequent oxidation of the oxidizable material to form an oxide layer over the conductive electrode. In some embodiments, the methods may include formation of a metal halide layer over a conductive electrode. Some embodiments include diodes that contain a metal halide layer between a pair of diode electrodes.

摘要翻译： 一些实施例包括形成二极管的方法。 所述方法可以包括氧化导电电极的上表面以在导电电极上形成氧化物层。 在一些实施方案中，所述方法可包括在导电电​​极上形成可氧化材料，以及随后氧化可氧化材料以在导电电极上形成氧化物层。 在一些实施例中，所述方法可包括在导电电​​极上形成金属卤化物层。 一些实施例包括在一对二极管电极之间包含金属卤化物层的二极管。