One illustrative device disclosed herein includes a substantially un-doped layer of a semiconductor material positioned above a semiconducting substrate, a device isolation structure, at least a portion of which is positioned in a trench that extends through the substantially un-doped semiconductor material and into the substrate, a plurality of outer fins and at least one inner fin defined in the substantially un-doped layer of semiconductor material, wherein the at least one inner fin is positioned laterally between the plurality of outer fins and wherein a width of a bottom of each of the plurality of outer fins is greater than a width of a bottom of the inner fin, and a gate electrode positioned around at least a portion of the plurality of outer fins and the inner fin.