Invention Grant
- Patent Title: Performing a multiply-multiply-accumulate instruction
- Patent Title (中): 执行乘法 - 累加指令
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Application No.: US13783963Application Date: 2013-03-04
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Publication No.: US08683183B2Publication Date: 2014-03-25
- Inventor: Eric Sprangle
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Trop, Pruner & Hu, P.C.
- Main IPC: G06F7/38
- IPC: G06F7/38 ; G06F9/00 ; G06F9/44 ; G06F15/00

Abstract:
In one embodiment, the present invention includes a processor having multiple execution units, at least one of which includes a circuit having a multiply-accumulate (MAC) unit including multiple multipliers and adders, and to execute a user-level multiply-multiply-accumulate instruction to populate a destination storage with a plurality of elements each corresponding to an absolute value for a pixel of a pixel block. Other embodiments are described and claimed.
Public/Granted literature
- US20130179661A1 Performing A Multiply-Multiply-Accumulate Instruction Public/Granted day:2013-07-11
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