发明授权
US08683249B2 Switching a processor and memory to a power saving mode when waiting to access a second slower non-volatile memory on-demand
有权
当等待按需访问第二个较慢的非易失性存储器时,将处理器和存储器切换到省电模式
- 专利标题: Switching a processor and memory to a power saving mode when waiting to access a second slower non-volatile memory on-demand
- 专利标题(中): 当等待按需访问第二个较慢的非易失性存储器时,将处理器和存储器切换到省电模式
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申请号: US13310892申请日: 2011-12-05
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公开(公告)号: US08683249B2公开(公告)日: 2014-03-25
- 发明人: Tatsunori Kanai , Yutaka Yamada , Hideki Yoshida , Masaya Tarui
- 申请人: Tatsunori Kanai , Yutaka Yamada , Hideki Yoshida , Masaya Tarui
- 申请人地址: JP Tokyo
- 专利权人: Kabushiki Kaisha Toshiba
- 当前专利权人: Kabushiki Kaisha Toshiba
- 当前专利权人地址: JP Tokyo
- 代理机构: Amin, Turocy & Watson, LLP
- 主分类号: G06F1/26
- IPC分类号: G06F1/26
摘要:
According to one embodiment, a computer system comprises a first memory that stores a first program, a second memory that stores a second program or data, a processor, a first and a second power control circuits. The first power control circuit causes the first memory to operate at a first power consumption when detecting change of an input signal to the processor, and causes the first memory to operate at a second power consumption smaller than the first power consumption and transmits a temporary halt instruction to the processor when the execution of the first program or the second program by the processor is completed. The second power control circuit causes the second memory to operate at a third power consumption before the processor executes the second program, reads or writes the data. The second memory accepts read and write operations while operating at the third power consumption.
公开/授权文献
- US20120117407A1 COMPUTER SYSTEM AND COMPUTER SYSTEM CONTROL METHOD 公开/授权日:2012-05-10
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