Invention Grant
- Patent Title: Semiconductor package substrates having layered circuit segments, and related methods
- Patent Title (中): 具有分层电路段的半导体封装基板及相关方法
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Application No.: US13629397Application Date: 2012-09-27
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Publication No.: US08686568B2Publication Date: 2014-04-01
- Inventor: Sheng-Ming Wang , Hsiang-Ming Feng , Yen-Hua Kuo
- Applicant: Advanced Semiconductor Engineering, Inc.
- Applicant Address: TW Kaohsiung
- Assignee: Advanced Semiconductor Engineering, Inc.
- Current Assignee: Advanced Semiconductor Engineering, Inc.
- Current Assignee Address: TW Kaohsiung
- Agency: Klein, O'Neill & Singh, LLP
- Main IPC: H01L23/48
- IPC: H01L23/48 ; H01L23/52 ; H01L29/40 ; H01L21/4763 ; H01L21/44

Abstract:
The package substrate includes a core, a plurality of first circuit segments, and a plurality of conductive pillars. Each of the first circuit segments has a patterned metal layer disposed on the core, a barrier layer disposed on the patterned metal layer, and an upper metal pattern disposed on the barrier layer. The conductive pillars penetrate the core, the patterned metal layer, and the barrier layer, and contact the upper metal pattern. The conductive pillars are formed from a material that can be selectively removed without affecting the barrier layer.
Public/Granted literature
- US20140084480A1 SEMICONDUCTOR PACKAGE SUBSTRATES HAVING LAYERED CIRCUIT SEGMENTS AND RELATED METHODS Public/Granted day:2014-03-27
Information query
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