Invention Grant
- Patent Title: Transfer request block cache system and method
- Patent Title (中): 传输请求块缓存系统和方法
-
Application No.: US12829343Application Date: 2010-07-01
-
Publication No.: US08700859B2Publication Date: 2014-04-15
- Inventor: Shuang-Shuang Qin , Jiin Lai , Zhi-Qiang Hui , Xiu-Li Guo
- Applicant: Shuang-Shuang Qin , Jiin Lai , Zhi-Qiang Hui , Xiu-Li Guo
- Applicant Address: TW Taipei
- Assignee: VIA Technologies, Inc.
- Current Assignee: VIA Technologies, Inc.
- Current Assignee Address: TW Taipei
- Agency: Stout, Uxa, Buyan & Mullins, LLP
- Agent Donald E. Stout
- Main IPC: G06F12/00
- IPC: G06F12/00
Abstract:
The present invention is directed to a transfer request block (TRB) cache system and method. A cache is used to store plural TRBs, and a mapping table is utilized to store corresponding TRB addresses in a system memory. A cache controller pre-fetches the TRBs and stores them in the cache according to the content of the mapping table.
Public/Granted literature
- US20110066812A1 TRANSFER REQUEST BLOCK CACHE SYSTEM AND METHOD Public/Granted day:2011-03-17
Information query
