公开(公告)号：US08645630B2

公开(公告)日：2014-02-04

申请号：US12829345

申请日：2010-07-01

申请人： Xiu-Li Guo ,  Jiin Lai ,  Zhi-Qiang Hui ,  Shuang-Shuang Qin

发明人： Xiu-Li Guo ,  Jiin Lai ,  Zhi-Qiang Hui ,  Shuang-Shuang Qin

IPC分类号： G06F12/00

CPC分类号： G06F12/0862 ,  G06F12/0875 ,  G06F12/10 ,  G06F2212/6028

摘要： The present invention is directed to a stream context cache system, which primarily includes a cache and a mapping table. The cache stores plural stream contexts, and the mapping table stores associated stream context addresses in a system memory. Consequently, a host may, according to the content of the mapping table, directly retrieve the stream context that is pre-fetched and stored in the cache, rather than read the stream context from the system memory.

摘要翻译： 本发明涉及一种流上下文高速缓存系统，其主要包括高速缓存和映射表。 高速缓存存储多个流上下文，并且映射表将相关联的流上下文地址存储在系统存储器中。 因此，主机可以根据映射表的内容直接检索预取和存储在高速缓存中的流上下文，而不是从系统存储器读取流上下文。

公开(公告)号：US08250393B2

公开(公告)日：2012-08-21

申请号：US12623546

申请日：2009-11-23

申请人： Shuang-Shuang Qin ,  Cheng-Wei Huang

发明人： Shuang-Shuang Qin ,  Cheng-Wei Huang

IPC分类号： G06F1/26 ,  G06F1/00 ,  G06F3/038 ,  G06F17/00 ,  G06F15/00 ,  G11C5/14

CPC分类号： G06F1/3237 ,  G06F1/3215 ,  Y02D10/128 ,  Y02D50/20

摘要： A power management method for use in a computer system having a processor, a power management module and a phase lock loop circuit (PLL) is provided. The power management module is coupled to a plurality of peripheral modules and the computer system and the processor are capable of being operated in a working state and power saving states. The method includes the following. When the computer system is operated in the working state and the processor is entered into a lowest power consumption state among the power saving states, states of the peripheral modules are detected to determine whether a specific condition has been matched. If the specific condition is matched, the processor is directed to a control state to control the PLL according to a control state configuration.

摘要翻译： 提供了一种用于具有处理器，电源管理模块和锁相环电路（PLL）的计算机系统中的电源管理方法。 电源管理模块耦合到多个外围模块，并且计算机系统和处理器能够在工作状态和省电状态下操作。 该方法包括以下。 当计算机系统在工作状态下操作并且处理器进入省电状态之间的最低功耗状态时，检测外围模块的状态以确定特定条件是否已匹配。 如果特定条件匹配，则处理器被引导到控制状态以根据控制状态配置来控制PLL。

公开(公告)号：US08700859B2

公开(公告)日：2014-04-15

申请号：US12829343

申请日：2010-07-01

申请人： Shuang-Shuang Qin ,  Jiin Lai ,  Zhi-Qiang Hui ,  Xiu-Li Guo

发明人： Shuang-Shuang Qin ,  Jiin Lai ,  Zhi-Qiang Hui ,  Xiu-Li Guo

IPC分类号： G06F12/00

CPC分类号： G06F12/0862

摘要： The present invention is directed to a transfer request block (TRB) cache system and method. A cache is used to store plural TRBs, and a mapping table is utilized to store corresponding TRB addresses in a system memory. A cache controller pre-fetches the TRBs and stores them in the cache according to the content of the mapping table.

摘要翻译： 本发明涉及一种传输请求块（TRB）高速缓存系统和方法。 高速缓存用于存储多个TRB，并且利用映射表将对应的TRB地址存储在系统存储器中。 缓存控制器根据映射表的内容预取TRB并将其存储在缓存中。

公开(公告)号：US20110066812A1

公开(公告)日：2011-03-17

申请号：US12829343

申请日：2010-07-01

申请人： SHUANG-SHUANG QIN ,  JIIN LAI ,  ZHI-QIANG HUI ,  XIU-LI GUO

发明人： SHUANG-SHUANG QIN ,  JIIN LAI ,  ZHI-QIANG HUI ,  XIU-LI GUO

IPC分类号： G06F12/08

CPC分类号： G06F12/0862

摘要： The present invention is directed to a transfer request block (TRB) cache system and method. A cache is used to store plural TRBs, and a mapping table is utilized to store corresponding TRB addresses in a system memory. A cache controller pre-fetches the TRBs and stores them in the cache according to the content of the mapping table.

摘要翻译： 本发明涉及一种传输请求块（TRB）高速缓存系统和方法。 高速缓存用于存储多个TRB，并且利用映射表将对应的TRB地址存储在系统存储器中。 缓存控制器根据映射表的内容预取TRB并将其存储在缓存中。

公开(公告)号：US20100281277A1

公开(公告)日：2010-11-04

申请号：US12619868

申请日：2009-11-17

申请人： Shuang-Shuang Qin ,  Cheng-Wei Huang

发明人： Shuang-Shuang Qin ,  Cheng-Wei Huang

IPC分类号： G06F1/26

CPC分类号： G06F1/3203 ,  G09G2330/022

摘要： A stand-by mode management module applied in a computer system having a BIOS (basic input/output system), a graphic module and a display module is provided. The computer system is operated in a working state and at least one stand-by state. The module includes a timer and an interrupt generation unit. The timer starts a count period when detecting that the computer system is idle. The interrupt generation unit generates an interrupt request to the BIOS to request the computer system to prepare to enter to a specific state when the count period is reached. When the specific state is entered, the computer system enters the stand-by state, a PLL (phase lock loop) of the display module keeps turning on, and PLLs other than the PLL of the display module are turned off and the graphic module acquires a frame stored in a fixed area of a storing unit and displays the acquired frame on the display module.

摘要翻译： 提供了具有BIOS（基本输入/输出系统），图形模块和显示模块的计算机系统中的备用模式管理模块。 计算机系统处于工作状态和至少一个待机状态。 该模块包括定时器和中断产生单元。 当检测到计算机系统空闲时，定时器启动计数周期。 当达到计数周期时，中断产生单元产生一个到BIOS的中断请求，请求计算机系统准备进入特定状态。 当进入特定状态时，计算机系统进入待机状态，显示模块的PLL（锁相环）持续导通，除了显示模块的PLL之外的PLL被关闭，图形模块获取 存储在存储单元的固定区域中的帧，并将获取的帧显示在显示模块上。

公开(公告)号：US08522054B2

公开(公告)日：2013-08-27

申请号：US12619868

申请日：2009-11-17

申请人： Shuang-Shuang Qin ,  Cheng-Wei Huang

发明人： Shuang-Shuang Qin ,  Cheng-Wei Huang

IPC分类号： G06F1/00

CPC分类号： G06F1/3203 ,  G09G2330/022

摘要： A stand-by mode management module applied in a computer system having a BIOS (basic input/output system), a graphic module and a display module is provided. The computer system is operated in a working state and at least one stand-by state. The module includes a timer and an interrupt generation unit. The timer starts a count period when detecting that the computer system is idle. The interrupt generation unit generates an interrupt request to the BIOS to request the computer system to prepare to enter to a specific state when the count period is reached. When the specific state is entered, the computer system enters the stand-by state, a PLL (phase lock loop) of the display module keeps turning on, and PLLs other than the PLL of the display module are turned off and the graphic module acquires a frame stored in a fixed area of a storing unit and displays the acquired frame on the display module.

摘要翻译： 提供了具有BIOS（基本输入/输出系统），图形模块和显示模块的计算机系统中的备用模式管理模块。 计算机系统处于工作状态和至少一个待机状态。 该模块包括定时器和中断产生单元。 当检测到计算机系统空闲时，定时器启动计数周期。 当达到计数周期时，中断产生单元产生一个到BIOS的中断请求，请求计算机系统准备进入特定状态。 当进入特定状态时，计算机系统进入待机状态，显示模块的PLL（锁相环）持续导通，除了显示模块的PLL之外的PLL被关闭，图形模块获取 存储在存储单元的固定区域中的帧，并将获取的帧显示在显示模块上。

公开(公告)号：US20110066795A1

公开(公告)日：2011-03-17

申请号：US12829345

申请日：2010-07-01

申请人： XIU-LI GUO ,  JIIN LAI ,  ZHI-QIANG HUI ,  SHUANG-SHUANG QIN

发明人： XIU-LI GUO ,  JIIN LAI ,  ZHI-QIANG HUI ,  SHUANG-SHUANG QIN

IPC分类号： G06F12/08 ,  G06F12/02

CPC分类号： G06F12/0862 ,  G06F12/0875 ,  G06F12/10 ,  G06F2212/6028

摘要： The present invention is directed to a stream context cache system, which primarily includes a cache and a mapping table. The cache stores plural stream contexts, and the mapping table stores associated stream context addresses in a system memory. Consequently, a host may, according to the content of the mapping table, directly retrieve the stream context that is pre-fetched and stored in the cache, rather than read the stream context from the system memory.

摘要翻译： 本发明涉及一种流上下文高速缓存系统，其主要包括高速缓存和映射表。 高速缓存存储多个流上下文，并且映射表将相关联的流上下文地址存储在系统存储器中。 因此，主机可以根据映射表的内容直接检索预取和存储在高速缓存中的流上下文，而不是从系统存储器读取流上下文。

公开(公告)号：US20100275045A1

公开(公告)日：2010-10-28

申请号：US12623546

申请日：2009-11-23

申请人： Shuang-Shuang Qin ,  Cheng-Wei Huang

发明人： Shuang-Shuang Qin ,  Cheng-Wei Huang

IPC分类号： G06F1/00

CPC分类号： G06F1/3237 ,  G06F1/3215 ,  Y02D10/128 ,  Y02D50/20

摘要： A power management method for use in a computer system having a processor, a power management module and a phase lock loop circuit (PLL) is provided. The power management module is coupled to a plurality of peripheral modules and the computer system and the processor are capable of being operated in a working state and power saving states. The method includes the following. When the computer system is operated in the working state and the processor is entered into a lowest power consumption state among the power saving states, states of the peripheral modules are detected to determine whether a specific condition has been matched. If the specific condition is matched, the processor is directed to a control state to control the PLL according to a control state configuration.

摘要翻译： 提供了一种用于具有处理器，电源管理模块和锁相环电路（PLL）的计算机系统中的电源管理方法。 电源管理模块耦合到多个外围模块，并且计算机系统和处理器能够在工作状态和省电状态下操作。 该方法包括以下。 当计算机系统在工作状态下操作并且处理器进入省电状态之间的最低功耗状态时，检测外围模块的状态以确定特定条件是否已匹配。 如果特定条件匹配，则处理器被引导到控制状态以根据控制状态配置来控制PLL。