发明授权
US08713256B2 Method, apparatus, and system for energy efficiency and energy conservation including dynamic cache sizing and cache operating voltage management for optimal power performance
有权
能量效率和节能的方法，装置和系统，包括动态高速缓存大小和高速缓存操作电压管理，实现最佳功率性能
- 专利标题： Method, apparatus, and system for energy efficiency and energy conservation including dynamic cache sizing and cache operating voltage management for optimal power performance
- 专利标题（中）： 能量效率和节能的方法，装置和系统，包括动态高速缓存大小和高速缓存操作电压管理，实现最佳功率性能
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申请号： US13336977申请日： 2011-12-23
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公开(公告)号： US08713256B2公开(公告)日： 2014-04-29
- 发明人: Inder M. Sodhi , Satish K. Damaraju , Sanjeev S. Jahagirdar , Ryan D. Wells
- 申请人： Inder M. Sodhi , Satish K. Damaraju , Sanjeev S. Jahagirdar , Ryan D. Wells
- 申请人地址： US CA Santa Clara
- 专利权人： Intel Corporation
- 当前专利权人： Intel Corporation
- 当前专利权人地址： US CA Santa Clara
- 代理机构： Blakely, Sokoloff, Taylor & Zafman LLP
- 主分类号： G06F12/00
- IPC分类号： G06F12/00
摘要：
Embodiments described herein vary an amount of cache available for use by a processor, and an amount of power supplied to the cache and to the processor, based on the amount of cache actually being used by the processor to process data. For example, a power control unit (PCU) may monitor a last level cache (LLC) to identify if the size or amount of the cache being used by a processor to process data and to determine heuristics based on that amount. Based on the monitored amount of cache being used and the heuristics, the PCU causes a corresponding decrease or increase in an amount of the cache available for use by the processor, and a corresponding decrease or increase in an amount of power supplied to the cache and to the processor.