Invention Grant
- Patent Title: Multiple level program verify in a memory device
- Patent Title (中): 在存储设备中进行多级程序验证
-
Application No.: US13537150Application Date: 2012-06-29
-
Publication No.: US08717823B2Publication Date: 2014-05-06
- Inventor: Taehoon Kim , Deping He , Jeffrey Alan Kessenich
- Applicant: Taehoon Kim , Deping He , Jeffrey Alan Kessenich
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Leffert Jay Polglaze, P.A.
- Main IPC: G11C11/34
- IPC: G11C11/34
Abstract:
A series of programming pulses are applied to a memory cell to be programmed. A program verify pulse, at an initial program verify voltage, is applied to the memory cell after each programming pulse. The initial program verify voltage is a verify voltage that has been increased by a quick charge loss voltage. The quick charge loss voltage is subtracted from the initial program verify voltage after either a programming pulse has reached a certain reference voltage or a quantity of programming pulses has reached a pulse count threshold.
Public/Granted literature
- US20120269004A1 MULTIPLE LEVEL PROGRAM VERIFY IN A MEMORY DEVICE Public/Granted day:2012-10-25
Information query
