发明授权
US08723268B2 N-channel and P-channel end-to-end finFET cell architecture with relaxed gate pitch
有权
N沟道和P沟道端到端finFET单元架构,具有放宽的栅极间距
- 专利标题: N-channel and P-channel end-to-end finFET cell architecture with relaxed gate pitch
- 专利标题(中): N沟道和P沟道端到端finFET单元架构,具有放宽的栅极间距
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申请号: US13495810申请日: 2012-06-13
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公开(公告)号: US08723268B2公开(公告)日: 2014-05-13
- 发明人: Victor Moroz , Deepak D. Sherlekar
- 申请人: Victor Moroz , Deepak D. Sherlekar
- 申请人地址: US CA Mountain View
- 专利权人: Synopsys, Inc.
- 当前专利权人: Synopsys, Inc.
- 当前专利权人地址: US CA Mountain View
- 代理机构: Haynes Beffel & Wolfeld LLP
- 代理商 Yiding Wu
- 主分类号: H01L29/76
- IPC分类号: H01L29/76
摘要:
A finFET block architecture uses end-to-end finFET blocks in which the fin lengths are at least twice the contact pitch, whereby there is enough space for interlayer connectors to be placed on the proximal end and the distal end of a given semiconductor fin, and on the gate element on the given semiconductor fin. A first set of semiconductor fins having a first conductivity type and a second set of semiconductor fins having a second conductivity type can be aligned end-to-end. Interlayer connectors can be aligned over corresponding semiconductor fins which connect to gate elements.
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