Invention Grant
US08745546B2 Mask overlay method, mask, and semiconductor device using the same 有权
掩模覆盖法,掩模和使用其的半导体器件

Mask overlay method, mask, and semiconductor device using the same
Abstract:
A mask overlay method, and a mask and a semiconductor device using the same are disclosed. According to the disclosed mask overlay technique, test marks and front layer overlay marks corresponding to a plurality of overlay mark designs are generated in a first layer of a semiconductor device. The test patterns generating the test marks each include a first sub pattern and a second sub pattern. Note that the first sub pattern has the same design as a front layer overlay pattern (which generates the front layer overlay mark corresponding thereto). Based on the test marks, performances of the plurality of overlay mark designs are graded. The front layer overlay mark corresponding to the overlay mark design having the best performance is regarded as an overlay reference for a mask of a second layer of the semiconductor device.
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