发明授权
US08767841B1 System and method for de-modulating a high-supply-domain differential signal and a common-mode clock in a front-end receiver 有权
在前端接收机中对高电源域差分信号和共模时钟进行解调的系统和方法

System and method for de-modulating a high-supply-domain differential signal and a common-mode clock in a front-end receiver
摘要:
Techniques for de-modulating a high-supply-domain differential signal and a common-mode clock in a front-end receiver are described herein. In one embodiment, a method for receiving a signal comprises receiving the signal via a receiver input, the received signal comprising a differential signal and a common-mode clock signal. The method also comprises shifting the received signal from a first voltage range to a second voltage range that is lower than the first voltage range, and providing the shifted received signal on a first level-shifted signal line and a second level-shifted signal line. The method further comprises sensing voltage differences between the first and second level-shifted lines to recover the differential signal, and sensing common-mode voltages on the first and second level-shifted signal lines to recover the common-mode clock signal.
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