Invention Grant
- Patent Title: Technique for controlling trench profile in semiconductor structures
-
Application No.: US12109302Application Date: 2008-04-24
-
Publication No.: US08772169B2Publication Date: 2014-07-08
- Inventor: Hui Chen , Qi Wang , Briant Harward , James Pan
- Applicant: Hui Chen , Qi Wang , Briant Harward , James Pan
- Applicant Address: US ME South Portland
- Assignee: Fairchild Semiconductor Corporation
- Current Assignee: Fairchild Semiconductor Corporation
- Current Assignee Address: US ME South Portland
- Main IPC: H01L21/311
- IPC: H01L21/311

Abstract:
A method for forming a semiconductor structure includes the following steps. Trenches are formed in a semiconductor region using a masking layer such that the trenches have a first depth, a first width along their bottom, and sidewalls having a first slope. The masking layer is removed, and a bevel etch is performed to taper the sidewalls of the trenches so that the sidewalls have a second slope less than the first slope.
Public/Granted literature
- US08815744B2 Technique for controlling trench profile in semiconductor structures Public/Granted day:2014-08-26
Information query
IPC分类: