Invention Grant
- Patent Title: Through silicon via with embedded barrier pad
- Patent Title (中): 通过硅通孔与嵌入式屏障垫
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Application No.: US13457841Application Date: 2012-04-27
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Publication No.: US08772945B2Publication Date: 2014-07-08
- Inventor: Yung-Chi Lin , Wen-Chih Chiou , Yen-Hung Chen , Sylvia Lo , Jing-Cheng Lin
- Applicant: Yung-Chi Lin , Wen-Chih Chiou , Yen-Hung Chen , Sylvia Lo , Jing-Cheng Lin
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Slater and Matsil, L.L.P.
- Main IPC: H01L23/48
- IPC: H01L23/48

Abstract:
A system and method are disclosed for providing a through silicon via (TSV) with a barrier pad deposited below the top surface of the TSV, the top surface having reduced topographic variations. A bottom TSV pad is deposited into a via and then polished so the top surface is below the substrate top surface. A barrier pad is then deposited in the via, and a top TSV pad deposited on the barrier pad. The top TSV barrier pad is polished to bring the top surface of the top TSV pad about level with the substrate. The barrier pad may be less than about 1 microns thick, and the top TSV pad may be less than about 6 microns thick. The barrier pad may be a dissimilar metal from the top and bottom TSV pads, and may be selected from a group comprising titanium, tantalum, cobalt, nickel and the like.
Public/Granted literature
- US20130285244A1 Through Silicon Via with Embedded Barrier Pad Public/Granted day:2013-10-31
Information query
IPC分类: