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公开(公告)号：US09112007B2
公开(公告)日：2015-08-18
申请号：US13619233
申请日：2012-09-14
申请人： Yung-Chi Lin , Hsin-Yu Chen , Lin-Chih Huang , Tsang-Jiuh Wu , Wen-Chih Chiou
发明人： Yung-Chi Lin , Hsin-Yu Chen , Lin-Chih Huang , Tsang-Jiuh Wu , Wen-Chih Chiou
IPC分类号： H01L21/44 , H01L21/768 , H01L23/31 , H01L23/48 , H01L23/525 , H01L23/532 , H01L23/00
CPC分类号： H01L23/528 , H01L21/76898 , H01L23/3114 , H01L23/3171 , H01L23/481 , H01L23/525 , H01L23/53223 , H01L23/53238 , H01L23/53252 , H01L23/53266 , H01L23/53271 , H01L24/05 , H01L24/13 , H01L27/088 , H01L2224/0401 , H01L2224/05024 , H01L2224/05552 , H01L2224/05567 , H01L2224/0557 , H01L2224/05572 , H01L2224/06181 , H01L2224/13022 , H01L2224/13025 , H01L2224/13111 , H01L2924/00014 , H01L2924/12042 , H01L2924/13091 , H01L2924/01047 , H01L2924/01029 , H01L2924/00012 , H01L2924/00
摘要： An apparatus comprises a through via formed in a substrate. The through via is coupled between a first side and a second side of the substrate. The through via comprises a bottom portion adjacent to the second side of the substrate, wherein the bottom portion is formed of a conductive material. The through via further comprises sidewall portions formed of the conductive material and a middle portion formed between the sidewall portions, wherein the middle portion is formed of a dielectric material.
摘要翻译： 一种装置包括形成在基板中的通孔。 通孔连接在基板的第一侧和第二侧之间。 通孔包括与基板的第二侧相邻的底部，其中底部由导电材料形成。 通孔还包括由导电材料形成的侧壁部分和形成在侧壁部分之间的中间部分，其中中间部分由电介质材料形成。
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公开(公告)号：US08946742B2
公开(公告)日：2015-02-03
申请号：US12897124
申请日：2010-10-04
申请人： Chen-Hua Yu , Hung-Pin Chang , Yung-Chi Lin , Chia-Lin Yu , Jui-Pin Hung , Chien Ling Hwang
发明人： Chen-Hua Yu , Hung-Pin Chang , Yung-Chi Lin , Chia-Lin Yu , Jui-Pin Hung , Chien Ling Hwang
IPC分类号： H01L33/00 , H01L21/768 , H01L21/683 , H01L23/48 , H01L33/48 , H01L33/64 , H01L21/48 , H01L23/14 , H01L23/498 , H01L23/00 , H01L33/62
CPC分类号： H01L21/76898 , H01L21/3065 , H01L21/486 , H01L21/6835 , H01L21/76843 , H01L21/76876 , H01L21/76877 , H01L21/76879 , H01L23/147 , H01L23/481 , H01L23/49827 , H01L24/29 , H01L24/48 , H01L24/49 , H01L24/97 , H01L33/005 , H01L33/0054 , H01L33/486 , H01L33/62 , H01L33/641 , H01L33/644 , H01L33/647 , H01L2221/68345 , H01L2221/68359 , H01L2224/16 , H01L2224/32225 , H01L2224/32506 , H01L2224/48091 , H01L2224/48227 , H01L2224/48233 , H01L2224/49113 , H01L2224/73265 , H01L2224/97 , H01L2924/00014 , H01L2924/01019 , H01L2924/01029 , H01L2924/01078 , H01L2924/01079 , H01L2924/01322 , H01L2924/04941 , H01L2924/12041 , H01L2924/14 , H01L2924/181 , H01L2924/19041 , H01L2933/0066 , H01L2924/3512 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： The substrate with through silicon plugs (or vias) described above removes the need for conductive bumps. The process flow is very simple and cost efficient. The structures described combines the separate TSV, redistribution layer, and conductive bump structures into a single structure. By combining the separate structures, a low resistance electrical connection with high heat dissipation capability is created. In addition, the substrate with through silicon plugs (or vias, or trenches) also allows multiple chips to be packaged together. A through silicon trench can surround the one or more chips to provide protection against copper diffusing to neighboring devices during manufacturing. In addition, multiple chips with similar or different functions can be integrated on the TSV substrate. Through silicon plugs with different patterns can be used under a semiconductor chip(s) to improve heat dissipation and to resolve manufacturing concerns.
摘要翻译： 具有上述通孔硅衬底（或通孔）的基板消除了对导电凸块的需要。 流程非常简单，成本效益高。 所描述的结构将单独的TSV，再分配层和导电凸块结构组合成单个结构。 通过组合单独的结构，产生具有高散热能力的低电阻电连接。 此外，具有通过硅插头（或通孔或沟槽）的基板还允许将多个芯片封装在一起。 通过硅沟槽可围绕一个或多个芯片，以在制造期间提供防止铜扩散到相邻器件的保护。 此外，具有相似或不同功能的多个芯片可以集成在TSV基板上。 通过具有不同图案的硅插头可以在半导体芯片下使用以改善散热并解决制造问题。
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公开(公告)号：US08791011B2
公开(公告)日：2014-07-29
申请号：US13775983
申请日：2013-02-25
申请人： Yung-Chi Lin , Weng-Jin Wu , Shau-Lin Shue
发明人： Yung-Chi Lin , Weng-Jin Wu , Shau-Lin Shue
IPC分类号： H01L21/4763
CPC分类号： H01L21/76871 , H01L21/76844 , H01L21/76877 , H01L21/76898 , H01L23/481 , H01L2224/131 , H01L2224/13147 , H01L2224/16145 , H01L2924/3011 , H01L2924/014 , H01L2924/00014
摘要： In a process, an opening is formed to extend from a front surface of a semiconductor substrate through a part of the semiconductor substrate. A metal seed layer is formed on a sidewall of the opening. A block layer is formed on only a portion of the metal seed layer. A metal layer is formed on the block layer and the metal seed layer to fill the opening.
摘要翻译： 在此过程中，形成从半导体衬底的前表面延伸穿过半导体衬底的一部分的开口。 金属种子层形成在开口的侧壁上。 仅在金属种子层的一部分上形成阻挡层。 在阻挡层和金属种子层上形成金属层以填充开口。
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公开(公告)号：US08772945B2
公开(公告)日：2014-07-08
申请号：US13457841
申请日：2012-04-27
申请人： Yung-Chi Lin , Wen-Chih Chiou , Yen-Hung Chen , Sylvia Lo , Jing-Cheng Lin
发明人： Yung-Chi Lin , Wen-Chih Chiou , Yen-Hung Chen , Sylvia Lo , Jing-Cheng Lin
IPC分类号： H01L23/48
CPC分类号： H01L21/76898 , H01L21/7685 , H01L21/76877 , H01L23/481 , H01L24/03 , H01L24/05 , H01L2224/0346 , H01L2224/03616 , H01L2224/0401 , H01L2224/04042 , H01L2224/04073 , H01L2224/05025 , H01L2224/05026 , H01L2224/05099 , H01L2224/05155 , H01L2224/05157 , H01L2224/05166 , H01L2224/05181 , H01L2224/05541 , H01L2224/05571 , H01L2224/05599 , H01L2224/05624 , H01L2224/05644 , H01L2224/05647 , H01L2224/05655 , H01L2224/05684 , H01L2924/00014 , H01L2924/00012 , H01L2924/207 , H01L2224/05552
摘要： A system and method are disclosed for providing a through silicon via (TSV) with a barrier pad deposited below the top surface of the TSV, the top surface having reduced topographic variations. A bottom TSV pad is deposited into a via and then polished so the top surface is below the substrate top surface. A barrier pad is then deposited in the via, and a top TSV pad deposited on the barrier pad. The top TSV barrier pad is polished to bring the top surface of the top TSV pad about level with the substrate. The barrier pad may be less than about 1 microns thick, and the top TSV pad may be less than about 6 microns thick. The barrier pad may be a dissimilar metal from the top and bottom TSV pads, and may be selected from a group comprising titanium, tantalum, cobalt, nickel and the like.
摘要翻译： 公开了一种用于向TSV提供沉积在TSV的顶表面下方的阻挡层的系统和方法，顶表面具有减小的地形变化。 将底部TSV焊盘沉积到通孔中，然后抛光，使得顶表面在衬底顶表面下方。 然后在通孔中沉积阻挡层，并且沉积在阻挡层上的顶部TSV焊盘。 顶部的TSV屏障垫被抛光，以使顶部TSV焊盘的顶部表面与衬底的高度一致。 阻挡垫可以小于约1微米厚，并且顶部TSV垫可以小于约6微米厚。 阻挡垫可以是来自顶部和底部TSV垫的不同金属，并且可以选自包括钛，钽，钴，镍等的组。
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公开(公告)号：US08507940B2
公开(公告)日：2013-08-13
申请号：US12879584
申请日：2010-09-10
申请人： Chen-Hua Yu , Hung-Pin Chang , Yung-Chi Lin , Chia-Lin Yu , Jui-Pin Hung , Chien Ling Hwang
发明人： Chen-Hua Yu , Hung-Pin Chang , Yung-Chi Lin , Chia-Lin Yu , Jui-Pin Hung , Chien Ling Hwang
IPC分类号： H01L33/00
CPC分类号： H01L21/76898 , H01L21/3065 , H01L21/486 , H01L21/6835 , H01L21/76843 , H01L21/76876 , H01L21/76877 , H01L21/76879 , H01L23/147 , H01L23/481 , H01L23/49827 , H01L24/29 , H01L24/48 , H01L24/49 , H01L24/97 , H01L33/005 , H01L33/0054 , H01L33/486 , H01L33/62 , H01L33/641 , H01L33/644 , H01L33/647 , H01L2221/68345 , H01L2221/68359 , H01L2224/16 , H01L2224/32225 , H01L2224/32506 , H01L2224/48091 , H01L2224/48227 , H01L2224/48233 , H01L2224/49113 , H01L2224/73265 , H01L2224/97 , H01L2924/00014 , H01L2924/01019 , H01L2924/01029 , H01L2924/01078 , H01L2924/01079 , H01L2924/01322 , H01L2924/04941 , H01L2924/12041 , H01L2924/14 , H01L2924/181 , H01L2924/19041 , H01L2933/0066 , H01L2924/3512 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： The package substrates with through silicon plugs (or vias) described above provide lateral and vertical heat dissipation pathways for semiconductor chips that require thermal management. Designs of through silicon plugs (TSPs) with high duty ratios can most effectively provide heat dissipation. TSP designs with patterns of double-sided combs can provide high duty ratios, such as equal to or greater than 50%. Package substrates with high duty ratios are useful for semiconductor chips that generate large amount of heat. An example of such semiconductor chip is a light-emitting diode (LED) chip.
摘要翻译： 具有上述通孔硅封装（或通孔）的封装衬底为需要热管理的半导体芯片提供侧向和垂直散热路径。 具有高占空比的通过硅插头（TSP）的设计可以最有效地提供散热。 具有双面梳状图案的TSP设计可以提供等于或大于50％的高占空比。 具有高占空比的封装衬底对于产生大量热量的半导体芯片是有用的。 这种半导体芯片的例子是发光二极管（LED）芯片。
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公开(公告)号：US20120007154A1
公开(公告)日：2012-01-12
申请号：US12834304
申请日：2010-07-12
申请人： Jing-Cheng Lin , Yung-Chi Lin , Ku-Feng Yang
发明人： Jing-Cheng Lin , Yung-Chi Lin , Ku-Feng Yang
IPC分类号： H01L23/48 , H01L29/06 , H01L21/768 , H01L29/78
CPC分类号： H01L21/76898 , H01L21/30604 , H01L21/31111 , H01L21/762 , H01L21/76802 , H01L21/76831 , H01L21/76877 , H01L21/823475 , H01L21/823481 , H01L23/481 , H01L24/11 , H01L29/78 , H01L2224/131 , H01L2924/01029 , H01L2924/00014
摘要： A device includes a semiconductor substrate having a front surface and a back surface opposite the front surface. An insulation region extends from the front surface into the semiconductor substrate. An inter-layer dielectric (ILD) is over the insulation region. A landing pad extends from a top surface of the ILD into the insulation region. A through-substrate via (TSV) extends from the back surface of the semiconductor substrate to the landing pad.
摘要翻译： 一种器件包括具有与前表面相对的前表面和后表面的半导体衬底。 绝缘区域从前表面延伸到半导体衬底中。 层间电介质（ILD）在绝缘区域之上。 着陆垫从ILD的顶表面延伸到绝缘区域中。 贯穿基板通孔（TSV）从半导体基板的背面延伸到着陆焊盘。
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公开(公告)号：US20110285005A1
公开(公告)日：2011-11-24
申请号：US12781960
申请日：2010-05-18
申请人： Yung-Chi LIN , Jing-Cheng LIN , Chen-Hua YU
发明人： Yung-Chi LIN , Jing-Cheng LIN , Chen-Hua YU
IPC分类号： H01L23/538
CPC分类号： H01L21/4857 , H01L21/4846 , H01L21/4853 , H01L21/486 , H01L21/56 , H01L21/563 , H01L21/565 , H01L21/6835 , H01L21/768 , H01L23/295 , H01L23/3128 , H01L23/49816 , H01L23/49822 , H01L23/49827 , H01L23/5389 , H01L24/03 , H01L24/11 , H01L24/19 , H01L24/24 , H01L25/0657 , H01L25/50 , H01L2221/68359 , H01L2224/02331 , H01L2224/02372 , H01L2224/0239 , H01L2224/0401 , H01L2224/12105 , H01L2224/16225 , H01L2224/24227 , H01L2224/32225 , H01L2224/73203 , H01L2224/73204 , H01L2225/06517 , H01L2225/06548 , H01L2225/06572 , H01L2924/01006 , H01L2924/01013 , H01L2924/01019 , H01L2924/0102 , H01L2924/01023 , H01L2924/01024 , H01L2924/01029 , H01L2924/01032 , H01L2924/01033 , H01L2924/01047 , H01L2924/01049 , H01L2924/01059 , H01L2924/01073 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01327 , H01L2924/10253 , H01L2924/10329 , H01L2924/12042 , H01L2924/1305 , H01L2924/13091 , H01L2924/14 , H01L2924/15192 , H01L2924/15311 , H01L2924/15788 , H01L2924/181 , H01L2924/00012 , H01L2924/00
摘要： A package system includes a first integrated circuit disposed over an interposer. The interposer includes at least one molding compound layer including a plurality of electrical connection structures through the at least one molding compound layer. A first interconnect structure is disposed over a first surface of the at least one molding compound layer and electrically coupled with the plurality of electrical connection structures. The first integrated circuit is electrically coupled with the first interconnect structure.
摘要翻译： 封装系统包括设置在插入器上的第一集成电路。 所述插入器包括至少一个包含穿过所述至少一个模塑复合层的多个电连接结构的模塑复合层。 第一互连结构设置在至少一个模塑复合层的第一表面上并与多个电连接结构电耦合。 第一集成电路与第一互连结构电耦合。
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公开(公告)号：US20140077374A1
公开(公告)日：2014-03-20
申请号：US13619233
申请日：2012-09-14
申请人： Yung-Chi Lin , Hsin-Yu Chen , Lin-Chih Huang , Tsang-Jiuh Wu , Wen-Chih Chiou
发明人： Yung-Chi Lin , Hsin-Yu Chen , Lin-Chih Huang , Tsang-Jiuh Wu , Wen-Chih Chiou
IPC分类号： H01L23/48 , H01L21/768
CPC分类号： H01L23/528 , H01L21/76898 , H01L23/3114 , H01L23/3171 , H01L23/481 , H01L23/525 , H01L23/53223 , H01L23/53238 , H01L23/53252 , H01L23/53266 , H01L23/53271 , H01L24/05 , H01L24/13 , H01L27/088 , H01L2224/0401 , H01L2224/05024 , H01L2224/05552 , H01L2224/05567 , H01L2224/0557 , H01L2224/05572 , H01L2224/06181 , H01L2224/13022 , H01L2224/13025 , H01L2224/13111 , H01L2924/00014 , H01L2924/12042 , H01L2924/13091 , H01L2924/01047 , H01L2924/01029 , H01L2924/00012 , H01L2924/00
摘要： An apparatus comprises a through via formed in a substrate. The through via is coupled between a first side and a second side of the substrate. The through via comprises a bottom portion adjacent to the second side of the substrate, wherein the bottom portion is formed of a conductive material. The through via further comprises sidewall portions formed of the conductive material and a middle portion formed between the sidewall portions, wherein the middle portion is formed of a dielectric material.
摘要翻译： 一种装置包括形成在基板中的通孔。 通孔连接在基板的第一侧和第二侧之间。 通孔包括与基板的第二侧相邻的底部，其中底部由导电材料形成。 通孔还包括由导电材料形成的侧壁部分和形成在侧壁部分之间的中间部分，其中中间部分由电介质材料形成。
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公开(公告)号：US20130285244A1
公开(公告)日：2013-10-31
申请号：US13457841
申请日：2012-04-27
申请人： Yung-Chi Lin , Wen-Chih Chiou , Yen-Hung Chen , Sylvia Lo , Jing-Cheng Lin
发明人： Yung-Chi Lin , Wen-Chih Chiou , Yen-Hung Chen , Sylvia Lo , Jing-Cheng Lin
IPC分类号： H01L23/48 , H01L21/283
CPC分类号： H01L21/76898 , H01L21/7685 , H01L21/76877 , H01L23/481 , H01L24/03 , H01L24/05 , H01L2224/0346 , H01L2224/03616 , H01L2224/0401 , H01L2224/04042 , H01L2224/04073 , H01L2224/05025 , H01L2224/05026 , H01L2224/05099 , H01L2224/05155 , H01L2224/05157 , H01L2224/05166 , H01L2224/05181 , H01L2224/05541 , H01L2224/05571 , H01L2224/05599 , H01L2224/05624 , H01L2224/05644 , H01L2224/05647 , H01L2224/05655 , H01L2224/05684 , H01L2924/00014 , H01L2924/00012 , H01L2924/207 , H01L2224/05552
摘要： A system and method are disclosed for providing a through silicon via (TSV) with a barrier pad deposited below the top surface of the TSV, the top surface having reduced topographic variations. A bottom TSV pad is deposited into a via and then polished so the top surface is below the substrate top surface. A barrier pad is then deposited in the via, and a top TSV pad deposited on the barrier pad. The top TSV barrier pad is polished to bring the top surface of the top TSV pad about level with the substrate. The barrier pad may be less than about 1 microns thick, and the top TSV pad may be less than about 6 microns thick. The barrier pad may be a dissimilar metal from the top and bottom TSV pads, and may be selected from a group comprising titanium, tantalum, cobalt, nickel and the like.
摘要翻译： 公开了一种用于向TSV提供沉积在TSV的顶表面下方的阻挡层的系统和方法，顶表面具有减小的地形变化。 将底部TSV焊盘沉积到通孔中，然后抛光，使得顶表面在衬底顶表面下方。 然后在通孔中沉积阻挡层，并且沉积在阻挡层上的顶部TSV焊盘。 顶部的TSV屏障垫被抛光，以使顶部TSV焊盘的顶部表面与衬底的高度一致。 阻挡垫可以小于约1微米厚，并且顶部TSV垫可以小于约6微米厚。 阻挡垫可以是来自顶部和底部TSV垫的不同金属，并且可以选自包括钛，钽，钴，镍等的组。
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公开(公告)号：US08338939B2
公开(公告)日：2012-12-25
申请号：US12834304
申请日：2010-07-12
申请人： Jing-Cheng Lin , Yung-Chi Lin , Ku-Feng Yang
发明人： Jing-Cheng Lin , Yung-Chi Lin , Ku-Feng Yang
IPC分类号： H01L23/48
CPC分类号： H01L21/76898 , H01L21/30604 , H01L21/31111 , H01L21/762 , H01L21/76802 , H01L21/76831 , H01L21/76877 , H01L21/823475 , H01L21/823481 , H01L23/481 , H01L24/11 , H01L29/78 , H01L2224/131 , H01L2924/01029 , H01L2924/00014
摘要： A device includes a semiconductor substrate having a front surface and a back surface opposite the front surface. An insulation region extends from the front surface into the semiconductor substrate. An inter-layer dielectric (ILD) is over the insulation region. A landing pad extends from a top surface of the ILD into the insulation region. A through-substrate via (TSV) extends from the back surface of the semiconductor substrate to the landing pad.
摘要翻译： 一种器件包括具有与前表面相对的前表面和后表面的半导体衬底。 绝缘区域从前表面延伸到半导体衬底中。 层间电介质（ILD）在绝缘区域之上。 着陆垫从ILD的顶表面延伸到绝缘区域中。 贯穿基板通孔（TSV）从半导体基板的背面延伸到着陆焊盘。
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