Invention Grant
- Patent Title: Methods and devices to reduce outer code failure rate variability
- Patent Title (中): 减少外部代码故障率变化的方法和设备
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Application No.: US13933911Application Date: 2013-07-02
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Publication No.: US08782505B2Publication Date: 2014-07-15
- Inventor: Bernardo Rub
- Applicant: Seagate Technology LLC
- Applicant Address: US CA Cupertino
- Assignee: Seagate Technology LLC
- Current Assignee: Seagate Technology LLC
- Current Assignee Address: US CA Cupertino
- Agency: Hollingsworth Davis, LLC
- Main IPC: G06F11/00
- IPC: G06F11/00

Abstract:
The variability of outer code failure rate of memory pages of a solid state memory device can be reduced by selectively grouping the pages included in the outer code words. The data in the page groups are encoded into outer code words which are stored in the memory device. Encoding the data of the page groups and storing the encoded data includes intermittently accumulating an outer code parity as the pages are sequentially stored in the memory device according to a particular order. The pages can be randomly selected for the page groups or can be grouped based on predicted or measured failure rate information. In a memory device having multi-level memory cells, predicting the failure rate of a page can be based on whether the page is a most significant bit (MSB) page or a least significant bit (LSB) page.
Public/Granted literature
- US20130297979A1 Methods and Devices to Reduce Outer Code Failure Rate Variability Public/Granted day:2013-11-07
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