公开(公告)号：US08826100B2

公开(公告)日：2014-09-02

申请号：US13686563

申请日：2012-11-27

Applicant: Seagate Technology LLC

Inventor： Bernardo Rub

IPC: G11C29/00 ,  G06F11/10

CPC classification number: G06F11/1072 ,  G06F11/1076 ,  H03M13/05

Abstract: An apparatus may comprise a memory including a first area of total usable storage capacity of the memory reported to a host device, a second area occupied by error correction code (ECC) appended to data stored in the first area, and a third area of usable data storage capacity not reported to the host device. The apparatus may further comprise a controller configured to balance sizes of the second area and third area to maintain a size of the first area as the length of ECC of data stored in the first area increases. The controller may be further configured to exchange data having an ECC of a controllable length with the memory based on a data storage location, and adjust the controllable length of the ECC based on an error history of the data storage location.

Abstract translation: 装置可以包括存储器，其包括向主机设备报告的存储器的总可用存储容量的第一区域，附加到存储在第一区域中的数据的纠错码（ECC）所占据的第二区域以及可用的第三区域 数据存储容量未报告给主机设备。 该装置还可以包括控制器，其被配置为平衡第二区域和第三区域的大小，以便随着存储在第一区域中的数据的ECC的长度增加而保持第一区域的大小。 控制器还可以被配置为基于数据存储位置与存储器交换具有可控长度的ECC的数据，并且基于数据存储位置的错误历史来调整ECC的可控长度。

公开(公告)号：US20130297979A1

公开(公告)日：2013-11-07

申请号：US13933911

申请日：2013-07-02

Applicant: Seagate Technology LLC

Inventor： Bernardo Rub

IPC: G06F11/10

CPC classification number: G06F11/10 ,  G06F11/1012 ,  G06F11/1076 ,  G11C7/1006 ,  G11C11/5621 ,  G11C11/5628 ,  G11C16/0483 ,  G11C16/3427 ,  G11C29/00 ,  G11C2211/5648 ,  G11C2216/14

Abstract: The variability of outer code failure rate of memory pages of a solid state memory device can be reduced by selectively grouping the pages included in the outer code words. The data in the page groups are encoded into outer code words which are stored in the memory device. Encoding the data of the page groups and storing the encoded data includes intermittently accumulating an outer code parity as the pages are sequentially stored in the memory device according to a particular order. The pages can be randomly selected for the page groups or can be grouped based on predicted or measured failure rate information. In a memory device having multi-level memory cells, predicting the failure rate of a page can be based on whether the page is a most significant bit (MSB) page or a least significant bit (LSB) page.

Abstract translation: 可以通过选择性地对包含在外部码字中的页面进行分组来减少固态存储器件的存储器页面的外部代码故障率的变化。 页组中的数据被编码为存储在存储器件中的外码字。 编码页组的数据并存储编码数据包括根据特定顺序随着页顺序存储在存储装置中而间歇地累积外码奇偶校验。 这些页面可以随机选择页面组，也可以根据预测或测量的故障率信息进行分组。 在具有多级存储器单元的存储器件中，可以基于页是最高有效位（MSB）页还是最低有效位（LSB）页来预测页的故障率。

公开(公告)号：US08782505B2

公开(公告)日：2014-07-15

申请号：US13933911

申请日：2013-07-02

Applicant: Seagate Technology LLC

Inventor： Bernardo Rub

IPC: G06F11/00

CPC classification number: G06F11/10 ,  G06F11/1012 ,  G06F11/1076 ,  G11C7/1006 ,  G11C11/5621 ,  G11C11/5628 ,  G11C16/0483 ,  G11C16/3427 ,  G11C29/00 ,  G11C2211/5648 ,  G11C2216/14

Abstract: The variability of outer code failure rate of memory pages of a solid state memory device can be reduced by selectively grouping the pages included in the outer code words. The data in the page groups are encoded into outer code words which are stored in the memory device. Encoding the data of the page groups and storing the encoded data includes intermittently accumulating an outer code parity as the pages are sequentially stored in the memory device according to a particular order. The pages can be randomly selected for the page groups or can be grouped based on predicted or measured failure rate information. In a memory device having multi-level memory cells, predicting the failure rate of a page can be based on whether the page is a most significant bit (MSB) page or a least significant bit (LSB) page.

Abstract translation: 可以通过选择性地对包含在外部码字中的页面进行分组来减少固态存储器件的存储器页面的外部代码故障率的变化。 页组中的数据被编码为存储在存储器件中的外码字。 编码页组的数据并存储编码数据包括根据特定顺序随着页顺序存储在存储装置中而间歇地累积外码奇偶校验。 这些页面可以随机选择页面组，也可以根据预测或测量的故障率信息进行分组。 在具有多级存储器单元的存储器件中，可以基于页是最高有效位（MSB）页还是最低有效位（LSB）页来预测页的故障率。

公开(公告)号：US20140122975A1

公开(公告)日：2014-05-01

申请号：US14149460

申请日：2014-01-07

Applicant: Seagate Technology LLC

Inventor： Ara Patapoutian ,  Bernardo Rub ,  Bruce D. Buch

IPC: H03M13/11 ,  G06F11/10

CPC classification number: G06F11/1008 ,  G06F11/1048 ,  G11C16/26 ,  G11C29/844 ,  H03M13/1108 ,  H03M13/1111 ,  H03M13/3707 ,  H03M13/45 ,  H03M13/451 ,  H03M13/458

Abstract: Approaches for decoding data read from memory cells of a nonvolatile, solid state memory involve attempting to decode hard data using a hard decoding process prior to a time that soft data is available to the decoder. The hard data includes information about the digital symbols stored in the memory cells without data confidence information. The soft data includes information about the digital symbols stored in the memory cells and data confidence information. In response to the hard decoding process failing to achieve convergence, after the soft data becomes available to the decoder, the soft data is decoded using a soft decoding process. The decoder generates an output of the decoded data after the hard decoding process or the soft decoding process achieves convergence.

Abstract translation: 用于解码从非易失性固态存储器的存储器单元读取的数据的方法包括在软数据可用于解码器的时间之前尝试使用硬解码处理对硬数据进行解码。 硬数据包括关于存储在存储器单元中的数字符号的信息，而没有数据置信度信息。 软数据包括关于存储在存储单元中的数字符号和数据置信度的信息。 响应于难以实现收敛的硬解码处理，在软数据变得可用于解码器之后，使用软解码处理解码软数据。 在硬解码处理或软解码处理实现收敛之后，解码器生成解码数据的输出。

公开(公告)号：US09122619B2

公开(公告)日：2015-09-01

申请号：US14149460

申请日：2014-01-07

Applicant: Seagate Technology LLC

Inventor： Ara Patapoutian ,  Bernardo Rub ,  Bruce D. Buch

IPC: G11C29/00 ,  H03M13/00 ,  G06F11/10 ,  H03M13/45 ,  G11C16/26 ,  H03M13/11 ,  H03M13/37

CPC classification number: G06F11/1008 ,  G06F11/1048 ,  G11C16/26 ,  G11C29/844 ,  H03M13/1108 ,  H03M13/1111 ,  H03M13/3707 ,  H03M13/45 ,  H03M13/451 ,  H03M13/458

Abstract: Approaches for decoding data read from memory cells of a nonvolatile, solid state memory involve attempting to decode hard data using a hard decoding process prior to a time that soft data is available to the decoder. The hard data includes information about the digital symbols stored in the memory cells without data confidence information. The soft data includes information about the digital symbols stored in the memory cells and data confidence information. In response to the hard decoding process failing to achieve convergence, after the soft data becomes available to the decoder, the soft data is decoded using a soft decoding process. The decoder generates an output of the decoded data after the hard decoding process or the soft decoding process achieves convergence.

Abstract translation: 用于解码从非易失性固态存储器的存储器单元读取的数据的方法包括在软数据可用于解码器的时间之前尝试使用硬解码处理对硬数据进行解码。 硬数据包括关于存储在存储器单元中的数字符号的信息，而没有数据置信度信息。 软数据包括关于存储在存储单元中的数字符号和数据置信度的信息。 响应于难以实现收敛的硬解码处理，在软数据变得可用于解码器之后，使用软解码处理解码软数据。 在硬解码处理或软解码处理实现收敛之后，解码器生成解码数据的输出。