Invention Grant
- Patent Title: Sigma-delta modulators with excess loop delay compensation
- Patent Title (中): 具有多余环路延迟补偿的Σ-Δ调制器
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Application No.: US13760379Application Date: 2013-02-06
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Publication No.: US08791848B2Publication Date: 2014-07-29
- Inventor: Chen-Yen Ho , Chi-Lun Lo , Hung-Chieh Tsai , Yu-Hsin Lin
- Applicant: MediaTek Inc.
- Applicant Address: TW Hsin-Chu
- Assignee: Mediatek Inc.
- Current Assignee: Mediatek Inc.
- Current Assignee Address: TW Hsin-Chu
- Agency: McClure, Qualey & Rodack, LLP
- Main IPC: H03M3/00
- IPC: H03M3/00

Abstract:
A sigma-delta modulator is provided for generating a digital output signal. The sigma-delta modulator includes a multi-stage loop filter, a quantizer, and a digital-to-analog converter. The multi-stage loop filter receives an analog input signal and generates an integrated output signal according to the analog input signal. Each stage of the multi-stage loop filter includes a feedback network. The quantizer receives the integrated output signal and quantizes the integrated output signal to generate the digital output signal. The digital-to-analog converter receives the digital output signal and converts the digital output signal to a compensation signal. The digital-to-analog converter provides the compensation signal to a plurality of internal nodes in the feedback network of the last stage of the multi-stage loop filter.
Public/Granted literature
- US20130214951A1 SIGMA-DELTA MODULATORS WITH EXCESS LOOP DELAY COMPENSATION Public/Granted day:2013-08-22
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