发明授权
US08804856B2 Programmable engine having a reconfigurable accelerator data path for testing and calibration of analog front ends in radio devices
有权
具有可重构加速器数据路径的可编程引擎，用于在无线电设备中测试和校准模拟前端
- 专利标题： Programmable engine having a reconfigurable accelerator data path for testing and calibration of analog front ends in radio devices
- 专利标题（中）： 具有可重构加速器数据路径的可编程引擎，用于在无线电设备中测试和校准模拟前端
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申请号： US12910129申请日： 2010-10-22
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公开(公告)号： US08804856B2公开(公告)日： 2014-08-12
- 发明人: Marian K. Verhelst , Hasnain Lakdawala , Krishnamurthy Soumyanath , Masoud Sajadieh
- 申请人： Marian K. Verhelst , Hasnain Lakdawala , Krishnamurthy Soumyanath , Masoud Sajadieh
- 申请人地址： US CA Santa Clara
- 专利权人： Intel Corporation
- 当前专利权人： Intel Corporation
- 当前专利权人地址： US CA Santa Clara
- 代理机构： Cool Patent, P.C.
- 主分类号： H04L27/00
- IPC分类号： H04L27/00
摘要：
Briefly, in accordance with one or more embodiments, a radio device comprises an analog front end comprising a radio to transmit and/or receive radio-frequency signals, and a programmable engine coupled to the analog front end. The programmable engine is capable of being programmed to perform one or more tests on the analog front end and includes a reconfigurable data path reconfigurable by the programmable engine to perform one or more tests on the analog front end.