发明授权
- 专利标题: Semiconductor die having fine pitch electrical interconnects
- 专利标题(中): 具有细间距电互连的半导体管芯
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申请号: US13243877申请日: 2011-09-23
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公开(公告)号: US08829677B2公开(公告)日: 2014-09-09
- 发明人: Keith Lake Barrie , Suzette K. Pangrie , Grant Villavicencio , Jeffrey S. Leal
- 申请人: Keith Lake Barrie , Suzette K. Pangrie , Grant Villavicencio , Jeffrey S. Leal
- 申请人地址: US CA San Jose
- 专利权人: Invensas Corporation
- 当前专利权人: Invensas Corporation
- 当前专利权人地址: US CA San Jose
- 代理机构: Lerner, David, Littenberg, Krumholz & Mentlik, LLP
- 主分类号: H01L23/28
- IPC分类号: H01L23/28 ; H01L23/31 ; H01L21/68 ; H01L23/00 ; H01L25/065 ; H01L23/29
摘要:
A die has interconnect pads on an interconnect side near an interconnect edge and has at least a portion of the interconnect side covered by a conformal dielectric coating, in which an interconnect trace over the dielectric coating forms a high interface angle with the surface of the dielectric coating. Because the traces have a high interface angle, a tendency for the interconnect materials to “bleed” laterally is mitigated and contact or overlap of adjacent traces is avoided. The interconnect trace includes a curable electrically conductive interconnect material; that is, it includes a material that can be applied in a flowable form, and thereafter cured or allowed to cure to form the conductive traces. Also, a method includes, prior to forming the traces, subjecting the surface of the conformal dielectric coating with a CF4 plasma treatment.
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