Invention Grant
US08847657B2 Low power receiver for implementing a high voltage interface implemented with low voltage devices
有权
低功率接收器，用于实现采用低电压器件实现的高压接口
- Patent Title: Low power receiver for implementing a high voltage interface implemented with low voltage devices
- Patent Title (中): 低功率接收器，用于实现采用低电压器件实现的高压接口
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Application No.: US13530426Application Date: 2012-06-22
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Publication No.: US08847657B2Publication Date: 2014-09-30
- Inventor: Pankaj Kumar , Pramod Parameswaran , Vani Deshpande , Makeshwar Kothandaraman
- Applicant: Pankaj Kumar , Pramod Parameswaran , Vani Deshpande , Makeshwar Kothandaraman
- Applicant Address: SG Singapore
- Assignee: Avago Technologies General IP (Singapore) Pte. Ltd.
- Current Assignee: Avago Technologies General IP (Singapore) Pte. Ltd.
- Current Assignee Address: SG Singapore
- Agency: Christopher P. Maiorana, PC
- Main IPC: H03L5/00
- IPC: H03L5/00
Abstract:
An apparatus comprising a first stage and a second stage. The first stage may be configured to generate an intermediate signal having a first voltage in response to an input signal having a second voltage received from a pad. The second stage may be configured to generate a core voltage in response to the first voltage. The voltage received from the pad may operate at a voltage compliant with one or more published interface specifications.
Public/Granted literature
- US20130342258A1 LOW POWER RECEIVER FOR IMPLEMENTING A HIGH VOLTAGE INTERFACE IMPLEMENTED WITH LOW VOLTAGE DEVICES Public/Granted day:2013-12-26
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