Invention Grant
- Patent Title: On-chip transmission line structures with balanced phase delay
- Patent Title (中): 具有平衡相位延迟的片上传输线结构
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Application No.: US13168512Application Date: 2011-06-24
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Publication No.: US08860191B2Publication Date: 2014-10-14
- Inventor: Hanyi Ding , Kai D. Feng , Zhong-Xiang He , Xuefeng Liu
- Applicant: Hanyi Ding , Kai D. Feng , Zhong-Xiang He , Xuefeng Liu
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: Hoffman Warnick LLC
- Agent Anthony J. Canale
- Main IPC: H01L23/66
- IPC: H01L23/66 ; H01P1/18 ; H01L23/522

Abstract:
A transmission wiring structure, associated design structure and associated method for forming the same. A structure is disclosed having: a plurality of wiring levels formed on a semiconductor substrate; a pair of adjacent first and second signal lines located in the wiring levels, wherein the first signal line comprises a first portion formed on a first wiring level and a second portion formed on a second wiring level; a primary dielectric structure having a first dielectric constant located between the first portion and a ground shield; and a secondary dielectric structure having a second dielectric constant different than the first dielectric constant, the secondary dielectric structure located between the second portion and the ground shield, and the second dielectric layer extending co-planar with the second portion and having a length that is substantially the same as the second portion.
Public/Granted literature
- US20120326798A1 ON-CHIP TRANSMISSION LINE STRUCTURES WITH BALANCED PHASE DELAY Public/Granted day:2012-12-27
Information query
IPC分类: