Invention Grant
- Patent Title: MRAM device and integration techniques compatible with logic integration
- Patent Title (中): MRAM器件与集成技术兼容逻辑集成
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Application No.: US14172208Application Date: 2014-02-04
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Publication No.: US08865481B2Publication Date: 2014-10-21
- Inventor: Xia Li , Xiaochun Zhu , Seung Hyuk Kang
- Applicant: QUALCOMM Incorporated
- Applicant Address: US CA San Diego
- Assignee: QUALCOMM Incorporated
- Current Assignee: QUALCOMM Incorporated
- Current Assignee Address: US CA San Diego
- Agent Sam Talpalatsky; Nicholas J. Pauley; Joseph Agusta
- Main IPC: H01L29/82
- IPC: H01L29/82 ; B82Y10/00 ; H01L43/08 ; H01L43/12 ; H01L27/22

Abstract:
A semiconductor device includes a magnetic tunnel junction (MTJ) storage element configured to be disposed in a common interlayer metal dielectric (IMD) layer with a logic element. Cap layers separate the common IMD layer from a top and bottom IMD layer. Top and bottom electrodes are coupled to the MTJ storage element. Metal connections to the electrodes are formed in the top and bottom IMD layers respectively through vias in the separating cap layers. Alternatively, the separating cap layers are recessed and the bottom electrodes are embedded, such that direct contact to metal connections in the bottom IMD layer is established. Metal connections to the top electrode in the common IMD layer are enabled by isolating the metal connections from the MTJ storage elements with metal islands and isolating caps.
Public/Granted literature
- US20140147941A1 MRAM DEVICE AND INTEGRATION TECHNIQUES COMPATIBLE WITH LOGIC INTEGRATION Public/Granted day:2014-05-29
Information query
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