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公开(公告)号：US12133395B2
公开(公告)日：2024-10-29
申请号：US18241856
申请日：2023-09-02
发明人： Zihui Wang , Yiming Huai
摘要： The present invention is directed to a perpendicular magnetic structure including a seed layer structure that includes a first seed layer comprising a metal element and oxygen; a second seed layer formed on top of the first seed layer and comprising cobalt, iron, and boron; and a third seed layer formed on top of the second seed layer and comprising chromium. The metal element is one of titanium, tantalum, or magnesium. The perpendicular magnetic structure further includes a magnetic fixed layer structure formed on top of the seed layer structure and having an invariable magnetization direction substantially perpendicular to a layer plane of the magnetic fixed layer structure. The magnetic fixed layer structure includes layers of a magnetic material interleaved with layers of a transition metal. The magnetic material includes cobalt. The transition metal is one of nickel, platinum, palladium, or iridium.
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公开(公告)号：US20240130242A1
公开(公告)日：2024-04-18
申请号：US18046162
申请日：2022-10-13
发明人： Ailian Zhao , Wu-Chang Tsai , Ashim Dutta , Chih-Chao Yang
CPC分类号： H01L43/08 , H01L23/481 , H01L27/222 , H01L43/02 , H01L43/12
摘要： Embodiments of present invention provide a method of forming a MRAM structure. The method includes forming at least one magnetic tunnel junction (MTJ) stack on top of a supporting structure; forming a conformal liner surrounding a sidewall of the MTJ stack; forming a first dielectric layer surrounding the conformal liner; selectively forming a metal oxide layer on top of the conformal liner and the first dielectric layer, the metal oxide layer having at least a first opening that exposes a top surface of the MTJ stack; and forming a top contact contacting the top surface of the MTJ stack through the first opening in the metal oxide layer. An MRAM structure formed thereby is also provided.
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3.发明公开公开(公告)号：US20240107893A1
公开(公告)日：2024-03-28
申请号：US17951596
申请日：2022-09-23
CPC分类号： H01L43/08 , G01R33/093 , G11B5/3909 , G11C11/161 , H01F10/325 , H01F10/3272 , H01L27/222 , H01L43/10 , G11B2005/3996
摘要： The present disclosure generally relates to magnetoresistive (MR) devices. The MR device comprises a synthetic antiferromagnetic (SAF) layer that increases exchange coupling field, and in turn, less magnetic noise of such devices. The MR device comprises a first ferromagnetic (FM1) layer and a second ferromagnetic (FM2) layer, in between which is an SAF spacer of RuAl alloy having a B2 crystalline structure which may grow epitaxial on BCC (110) or FCC (111) textures, meaning that the (110) or (111) plane is parallel to the surface of MR device substrate. Further, amorphous layers may be inserted into the device structure to reset the growth texture of the device to a (001), (110), or (111) texture in order to promote the growth of tunneling barrier layers or antiferromagnetic (AF) pinning layers.
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公开(公告)号：US20240065108A1
公开(公告)日：2024-02-22
申请号：US17944242
申请日：2022-09-14
发明人： Hui-Lin Wang , Ching-Hua Hsu , Chen-Yi Weng , Jing-Yin Jhang , Po-Kai Hsu
CPC分类号： H01L43/12 , H01L43/08 , G11C11/161 , H01L43/02 , H01L27/222 , H01L43/10
摘要： The high-density MRAM device of the present invention has a second interlayer dielectric (ILD) layer covering the capping layer in the MRAM cell array area and the logic area. The thickness of the second ILD layer in the MRAM cell array area is greater than that in the logic area. The composition of the second ILD layer in the logic area is different from the composition of the second ILD layer in the MRAM cell array area.
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公开(公告)号：US20240032435A1
公开(公告)日：2024-01-25
申请号：US17814243
申请日：2022-07-22
CPC分类号： H01L43/08 , H01L27/222 , H01L43/02 , H01L43/12 , G11C11/161
摘要： Embodiments of present invention provide a method of forming a MRAM structure. The method includes patterning a bottom electrode layer and a first ferromagnetic layer on top of the bottom electrode layer; depositing a dielectric layer, the dielectric layer covering the bottom electrode layer and the first ferromagnetic layer; creating an opening in the dielectric layer, the opening exposing a portion of the first ferromagnetic layer; forming a tunnel barrier layer inside the opening; forming a second ferromagnetic layer on top of the tunnel barrier layer; patterning the tunnel barrier layer and the second ferromagnetic layer; and forming a top electrode layer on top of the second ferromagnetic layer. Structures formed thereby are also provided.
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公开(公告)号：US20240020520A1
公开(公告)日：2024-01-18
申请号：US17865966
申请日：2022-07-15
申请人： TDK CORPORATION
发明人： Shogo YAMADA , Keita SUDA , Yukio TERASAKI , Tomoyuki SASAKI
CPC分类号： G06N3/063 , H01L27/228 , H01L43/02 , H01L43/08
摘要： A memristor includes a first variable conductance element and a second variable conductance element. A minimum value of conductance of the second variable conductance element during reading is larger than a maximum value of conductance of the first variable conductance element during reading. In the memristor, a first read path when the conductance of the first variable conductance element is read merges with a second read path when the conductance of the second variable conductance element is read.
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公开(公告)号：US11864466B2
公开(公告)日：2024-01-02
申请号：US17385264
申请日：2021-07-26
发明人： Shy-Jay Lin , Chwen Yu , William J. Gallagher
IPC分类号： G11C11/16 , H01L43/08 , H01L43/12 , H01L43/02 , H10N50/01 , H01F10/32 , H01F41/34 , H10B61/00 , H10N50/10 , H10N50/80
CPC分类号： H10N50/01 , G11C11/161 , H01F10/3254 , H01F41/34 , H10B61/00 , H10B61/22 , H10N50/10 , H10N50/80
摘要： In a method of manufacturing a semiconductor device, a magnetic random access memory (MRAM) cell structure is formed. The MRAM cell structure includes a bottom electrode, a magnetic tunnel junction (MTJ) stack and a top electrode. A first insulating cover layer is formed over the MRAM cell structure. A second insulating cover layer is formed over the first insulating cover layer. An interlayer dielectric (ILD) layer is formed. A contact opening in the ILD layer is formed, thereby exposing the second insulating cover layer. A part of the second insulating cover layer and a part of the first insulating cover layer are removed, thereby exposing the top electrode. A conductive layer is formed in the opening contacting the top electrode. The second insulating cover layer has an oxygen getter property.
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公开(公告)号：US20230402079A1
公开(公告)日：2023-12-14
申请号：US17806790
申请日：2022-06-14
CPC分类号： G11C11/161 , H01L43/08 , H01L43/02 , H01L43/12 , H01L27/222
摘要： Embodiments of the invention include a semiconductor structure with a first magneto-resistive random access memory (MRAM) pillar with a bottom electrode layer, a reference layer connected above the bottom electrode layer, a free layer, and a tunnel barrier between the reference layer and the free layer. The MRAM pillar includes a pillar diameter. The semiconductor structure also includes a coaxial top electrode with a top diameter that is less than the pillar diameter.
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公开(公告)号：US20230309320A1
公开(公告)日：2023-09-28
申请号：US17656045
申请日：2022-03-23
发明人： Heng Wu , Ruilong Xie , Julien Frougier , Min Gyu Sung , Chen Zhang
CPC分类号： H01L27/228 , G11C11/161 , G11C11/1697 , H01L43/08 , H01L43/14 , H01L43/04
摘要： Embodiments are disclosed for a system. The system includes a semiconductor structure. The semiconductor structure includes a wafer, multiple transistors, and a magnetoresistive random access memory (MRAM) cell disposed on the backside of the wafer. The transistors are disposed on a front end of line (FEOL) of the wafer. The MRAM cell is connected to a source-drain of the transistors by a contact disposed on the backside of the wafer. The transistors are in direct electrical contact with the MRAM cell by at least one contact.
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10.发明公开公开(公告)号：US20230307028A1
公开(公告)日：2023-09-28
申请号：US17656310
申请日：2022-03-24
发明人： Alan KALITSOV , Derek STEWART , Ananth KAUSHIK , Gerardo BERTERO
CPC分类号： G11C11/161 , H01F10/3286 , G11C11/1675 , G11C11/1673 , H01L43/08 , H01L43/10 , H01L43/02 , H01L27/222 , G01R33/093
摘要： A magnetoresistive memory cell includes a magnetoresistive layer stack containing a reference layer, a nonmagnetic spacer layer, and a free layer. A ferroelectric material layer having two stable ferroelectric states is coupled to a strain-modulated ferromagnetic layer to alter a sign of magnetic exchange coupling between the strain-modulated ferromagnetic layer and the free layer. The strain-modulated ferromagnetic layer may be the reference layer or a perpendicular magnetic anisotropy layer that is located proximate to the ferroelectric material layer. The magnetoresistive memory cell may be configured as a three-terminal device or as a two-terminal device, and may be configured as a tunneling magnetoresistance (TMR) device or as a giant magnetoresistance (GMR) device.
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