发明授权
US08866719B2 Memory device and liquid crystal display device equipped with memory device
有权
内存装置和配备有记忆装置的液晶显示装置
- 专利标题： Memory device and liquid crystal display device equipped with memory device
- 专利标题（中）： 内存装置和配备有记忆装置的液晶显示装置
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申请号： US13395549申请日： 2010-05-18
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公开(公告)号： US08866719B2公开(公告)日： 2014-10-21
- 发明人: Shuji Nishi , Yuhichiroh Murakami , Shige Furuta , Yasushi Sasaki , Seijirou Gyouten
- 申请人： Shuji Nishi , Yuhichiroh Murakami , Shige Furuta , Yasushi Sasaki , Seijirou Gyouten
- 申请人地址： JP Osaka
- 专利权人： Sharp Kabushiki Kaisha
- 当前专利权人： Sharp Kabushiki Kaisha
- 当前专利权人地址： JP Osaka
- 代理机构： Harness, Dickey & Pierce, P.L.C.
- 优先权： JP2009-215061 20090916
- 国际申请： PCT/JP2010/058382 WO 20100518
- 国际公布： WO2011/033821 WO 20110324
- 主分类号： G09G3/36
- IPC分类号： G09G3/36 ; H01L27/108 ; G11C11/406 ; H01L27/12
摘要：
A transistor (N1) has a gate terminal connected to a word line (Xi(1)) and a first conduction terminal connected to a bit line (Yj). A transistor (N2) has a gate terminal connected to the word line (Xi(2)) and a first conduction terminal connected to a node (PIX). A transistor (N3) has a gate terminal connected to a node (MRY) and a first conduction terminal connected to the word line (Xi(2)). A transistor (N4) has a gate terminal connected to the word line (Xi(3)), a first conduction terminal connected to a second conduction terminal of the transistor (N3), and a second conduction terminal connected to the node (PIX). Capacitors (Ca1), (Cb1), (Cap1) are formed between the node (PIX) and a reference electric potential wire (RL1), between the node (MRY) and the reference electric potential wire (RL1), and between the first conduction terminal of the transistor (N3) and the node (MRY), respectively.
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